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MC74HC10ADR2G

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onsemi Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74HC10ADR2G

onsemi · Logic Gates · SOIC-14

MC74HC10ADR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Input A of NAND gate 1; keep it within GND to VCC and tie it to GND or VCC if unused.
2 B1 input Input B of NAND gate 1; keep it within GND to VCC and tie it to GND or VCC if unused.
3 A2 input Input A of NAND gate 2; keep it within GND to VCC and tie it to GND or VCC if unused.
4 B2 input Input B of NAND gate 2; keep it within GND to VCC and tie it to GND or VCC if unused.
5 C2 input Input C of NAND gate 2; keep it within GND to VCC and tie it to GND or VCC if unused.
6 Y2 output Output of NAND gate 2 (Y = NOT(A·B·C)); leave open if unused and drive up to 10 LSTTL loads.
7 GND power_in Ground reference for the device; all voltages are referenced to this pin.
8 Y3 output Output of NAND gate 3 (Y = NOT(A·B·C)); leave open if unused and drive up to 10 LSTTL loads.
9 A3 input Input A of NAND gate 3; keep it within GND to VCC and tie it to GND or VCC if unused.
10 B3 input Input B of NAND gate 3; keep it within GND to VCC and tie it to GND or VCC if unused.
11 C3 input Input C of NAND gate 3; keep it within GND to VCC and tie it to GND or VCC if unused.
12 Y1 output Output of NAND gate 1 (Y = NOT(A·B·C)); leave open if unused and drive up to 10 LSTTL loads.
13 C1 input Input C of NAND gate 1; keep it within GND to VCC and tie it to GND or VCC if unused.
14 VCC power_in Positive supply; recommended operating range is 2.0 V to 6.0 V referenced to GND.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND) VCC 2 6 V Referenced to GND 2
DC Input Voltage, Output Voltage (Referenced to GND) Vin, Vout 0 V Referenced to GND; max printed as VCC 2
Operating Temperature, All Package Types TA -55 125 °C 2
Input Rise Time tr 0 1000 ns VCC = 2.0 V (Figure 1) 2
Input Fall Time tf 0 1000 ns VCC = 2.0 V (Figure 1) 2
Input Rise Time tr 0 600 ns VCC = 3.0 V (Figure 1) 2
Input Fall Time tf 0 600 ns VCC = 3.0 V (Figure 1) 2
Input Rise Time tr 0 500 ns VCC = 4.5 V (Figure 1) 2
Input Fall Time tf 0 500 ns VCC = 4.5 V (Figure 1) 2
Input Rise Time tr 0 400 ns VCC = 6.0 V (Figure 1) 2
Input Fall Time tf 0 400 ns VCC = 6.0 V (Figure 1) 2
DC Supply Voltage (Referenced to GND) VCC -0.5 7 V Referenced to GND 2
DC Input Voltage (Referenced to GND) Vin -0.5 V Referenced to GND; max printed as VCC + 0.5 2
DC Output Voltage (Referenced to GND) Vout -0.5 V Referenced to GND; max printed as VCC + 0.5 2
DC Input Current, per Pin Iin -20 20 mA Per pin 2
DC Output Current, per Pin Iout -25 25 mA Per pin 2
DC Supply Current, VCC and GND Pins ICC -50 50 mA VCC and GND pins 2
Power Dissipation in Still Air, SOIC Package PD 500 mW Still air, SOIC package; derate −7 mW/°C from 65 to 125 °C 2
Storage Temperature Tstg -65 150 °C 2
Lead Temperature, 1 mm from Case for 10 Seconds TL 260 °C 1 mm from case for 10 s (SOIC or TSSOP package) 2
Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Input Voltage VIH 2.1 V VCC = 3.0 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Input Voltage VIH 3.15 V VCC = 4.5 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Input Voltage VIH 4.2 V VCC = 6.0 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 0.5 V VCC = 2.0 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 0.9 V VCC = 3.0 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 1.35 V VCC = 4.5 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Maximum Low-Level Input Voltage VIL 1.8 V VCC = 6.0 V; Vout = 0.1 V or VCC, 0.1 V; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Output Voltage VOH 1.9 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Output Voltage VOH 4.4 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Output Voltage VOH 5.9 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Minimum High-Level Output Voltage VOH 2.2 V VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4 mA; −55 to 125 °C 3
Minimum High-Level Output Voltage VOH 3.7 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 4.0 mA; −55 to 125 °C 3
Minimum High-Level Output Voltage VOH 5.2 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 5.2 mA; −55 to 125 °C 3
Maximum Low-Level Output Voltage VOL 0.1 V VCC = 2.0 V; Vin = VIH; /Iout/ ≤ 20 μA; −55 to 125 °C 3
Maximum Low-Level Output Voltage VOL 0.4 V VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4 mA; −55 to 125 °C 3
Maximum Input Leakage Current Iin -1 1 μA VCC = 6.0 V; Vin = VCC or GND; −55 to 125 °C 3
Maximum Quiescent Supply Current (per Package) ICC 40 μA VCC = 6.0 V; Vin = VCC or GND; Iout = 0 μA; −55 to 125 °C 3
Maximum Propagation Delay, Input A, B, or C to Output Y tPLH, tPHL 145 ns VCC = 2.0 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Propagation Delay, Input A, B, or C to Output Y tPLH, tPHL 75 ns VCC = 3.0 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Propagation Delay, Input A, B, or C to Output Y tPLH, tPHL 29 ns VCC = 4.5 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Propagation Delay, Input A, B, or C to Output Y tPLH, tPHL 25 ns VCC = 6.0 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 110 ns VCC = 2.0 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 55 ns VCC = 3.0 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 22 ns VCC = 4.5 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 19 ns VCC = 6.0 V; CL = 50 pF, input tr = tf = 6 ns (Figures 1 and 2); −55 to 125 °C 3
Maximum Input Capacitance Cin 10 pF 3

CAD (KiCad official)

  • Symbol: MC74HC10ADR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74hc10adr2g-etched.step / mc74hc10adr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc10adr2g.step / mc74hc10adr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 35269f4c6401e34e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF