component
MC74HC04ADG
Public Made by Adomby adom
onsemi Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownMC74HC04ADG
onsemi · Inverters · SOIC-14
MC74HC04ADG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input of inverter 1; device inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs. |
| 2 | Y1 | output | Output of inverter 1 (Y = A); outputs interface directly to CMOS, NMOS and TTL, with 10 LSTTL loads drive capability. |
| 3 | A2 | input | Input of inverter 2; device inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs. |
| 4 | Y2 | output | Output of inverter 2 (Y = A); outputs interface directly to CMOS, NMOS and TTL, with 10 LSTTL loads drive capability. |
| 5 | A3 | input | Input of inverter 3; device inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs. |
| 6 | Y3 | output | Output of inverter 3 (Y = A); outputs interface directly to CMOS, NMOS and TTL, with 10 LSTTL loads drive capability. |
| 7 | GND | power_in | Ground reference for all voltages; VCC is specified as 2.0 to 6.0 V referenced to GND. |
| 8 | Y4 | output | Output of inverter 4 (Y = A); outputs interface directly to CMOS, NMOS and TTL, with 10 LSTTL loads drive capability. |
| 9 | A4 | input | Input of inverter 4; device inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs. |
| 10 | Y5 | output | Output of inverter 5 (Y = A); outputs interface directly to CMOS, NMOS and TTL, with 10 LSTTL loads drive capability. |
| 11 | A5 | input | Input of inverter 5; device inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs. |
| 12 | Y6 | output | Output of inverter 6 (Y = A); outputs interface directly to CMOS, NMOS and TTL, with 10 LSTTL loads drive capability. |
| 13 | A6 | input | Input of inverter 6; device inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs. |
| 14 | VCC | power_in | Positive supply; DC supply voltage 2.0 to 6.0 V referenced to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | 2 | 6 | V | Referenced to GND | 2 | |
| DC Input Voltage, Output Voltage | Vin, Vout | 0 | V | Referenced to GND; maximum is VCC | 2 | ||
| Operating Temperature, All Package Types | TA | -55 | 125 | °C | 2 | ||
| Input Rise and Fall Time | tr, tf | 0 | 1000 | ns | VCC = 2.0 V (Figure 1) | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 500 | ns | VCC = 4.5 V (Figure 1) | 2 | |
| Input Rise and Fall Time | tr, tf | 0 | 400 | ns | VCC = 6.0 V (Figure 1) | 2 | |
| DC Supply Voltage | VCC | -0.5 | 7 | V | Referenced to GND | 2 | |
| DC Input Voltage | Vin | -0.5 | V | Referenced to GND; maximum is VCC + 0.5 | 2 | ||
| DC Output Voltage | Vout | -0.5 | V | Referenced to GND; maximum is VCC + 0.5 | 2 | ||
| DC Input Current, per Pin | Iin | -20 | 20 | mA | 2 | ||
| DC Output Current, per Pin | Iout | -25 | 25 | mA | 2 | ||
| DC Supply Current, VCC and GND Pins | ICC | -50 | 50 | mA | 2 | ||
| Power Dissipation in Still Air, SOIC Package | PD | 500 | mW | SOIC package | 2 | ||
| Storage Temperature | Tstg | -65 | 150 | °C | 2 | ||
| Lead Temperature, 1 mm from Case for 10 Seconds | TL | 260 | °C | SOIC or TSSOP package | 2 | ||
| Derating, SOIC Package | -7 | mW/°C | from 65 to 125°C | 2 | |||
| Minimum High-Level Input Voltage | VIH | 1.5 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 2.0 V; ≤125°C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 2.1 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 3.0 V; ≤125°C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 3.15 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 4.5 V; ≤125°C | 3 | ||
| Minimum High-Level Input Voltage | VIH | 4.2 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 6.0 V; ≤125°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.5 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 2.0 V; ≤125°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 0.9 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 3.0 V; ≤125°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 1.35 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 4.5 V; ≤125°C | 3 | ||
| Maximum Low-Level Input Voltage | VIL | 1.8 | V | Vout = 0.1V or VCC -0.1V; /Iout/ ≤ 20µA; VCC = 6.0 V; ≤125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 1.9 | V | Vin = VIH or VIL; /Iout/ ≤ 20µA; VCC = 2.0 V; ≤125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 4.4 | V | Vin = VIH or VIL; /Iout/ ≤ 20µA; VCC = 4.5 V; ≤125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.9 | V | Vin = VIH or VIL; /Iout/ ≤ 20µA; VCC = 6.0 V; ≤125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 2.2 | V | Vin = VIH or VIL; /Iout/ ≤ 2.4mA; VCC = 3.0 V; ≤125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 3.7 | V | Vin = VIH or VIL; /Iout/ ≤ 4.0mA; VCC = 4.5 V; ≤125°C | 3 | ||
| Minimum High-Level Output Voltage | VOH | 5.2 | V | Vin = VIH or VIL; /Iout/ ≤ 5.2mA; VCC = 6.0 V; ≤125°C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.1 | V | Vin = VIH or VIL; /Iout/ ≤ 20µA; VCC = 2.0 V; ≤125°C | 3 | ||
| Maximum Low-Level Output Voltage | VOL | 0.4 | V | Vin = VIH or VIL; /Iout/ ≤ 2.4mA; VCC = 3.0 V; ≤125°C | 3 | ||
| Maximum Input Leakage Current | Iin | -1 | 1 | µA | Vin = VCC or GND; VCC = 6.0 V; ≤125°C | 3 | |
| Maximum Quiescent Supply Current (per Package) | ICC | 40 | µA | Vin = VCC or GND; Iout = 0A; VCC = 6.0 V; ≤125°C | 3 | ||
| Maximum Propagation Delay, Input A or B to Output Y | tPLH, tPHL | 110 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 2.0 V; ≤125°C | 3 | ||
| Maximum Propagation Delay, Input A or B to Output Y | tPLH, tPHL | 55 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 3.0 V; ≤125°C | 3 | ||
| Maximum Propagation Delay, Input A or B to Output Y | tPLH, tPHL | 22 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 4.5 V; ≤125°C | 3 | ||
| Maximum Propagation Delay, Input A or B to Output Y | tPLH, tPHL | 19 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 6.0 V; ≤125°C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 110 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 2.0 V; ≤125°C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 36 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 3.0 V; ≤125°C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 22 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 4.5 V; ≤125°C | 3 | ||
| Maximum Output Transition Time, Any Output | tTLH, tTHL | 19 | ns | CL = 50pF, Input tr = tf = 6ns; VCC = 6.0 V; ≤125°C | 3 | ||
| Maximum Input Capacitance | Cin | 10 | pF | ≤125°C | 3 | ||
| Power Dissipation Capacitance (Per Inverter) | CPD | 20 | pF | Typical @ 25°C, VCC = 5.0 V | 3 |
CAD (KiCad official)
- Symbol:
MC74HC04ADG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc74hc04adg-etched.step/mc74hc04adg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74hc04adg.step/mc74hc04adg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (7 pp, sha256
a4dff58055db00c5, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).