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Contents

README

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MC74HC00ADTR2G

onsemi · Gates · TSSOP-14

MC74HC00ADTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Data input A of NAND gate 1; unused inputs must be tied to GND or VCC, never left open.
2 B1 input Data input B of NAND gate 1; unused inputs must be tied to GND or VCC, never left open.
3 Y1 output Output of NAND gate 1 (Y = A·B); unused outputs must be left open.
4 A2 input Data input A of NAND gate 2; unused inputs must be tied to GND or VCC, never left open.
5 B2 input Data input B of NAND gate 2; unused inputs must be tied to GND or VCC, never left open.
6 Y2 output Output of NAND gate 2 (Y = A·B); unused outputs must be left open.
7 GND power_in Ground reference for all voltages; VCC is specified from 2.0 V to 6.0 V referenced to GND.
8 Y3 output Output of NAND gate 3 (Y = A·B); unused outputs must be left open.
9 A3 input Data input A of NAND gate 3; unused inputs must be tied to GND or VCC, never left open.
10 B3 input Data input B of NAND gate 3; unused inputs must be tied to GND or VCC, never left open.
11 Y4 output Output of NAND gate 4 (Y = A·B); unused outputs must be left open.
12 A4 input Data input A of NAND gate 4; unused inputs must be tied to GND or VCC, never left open.
13 B4 input Data input B of NAND gate 4; unused inputs must be tied to GND or VCC, never left open.
14 VCC power_in Positive supply, 2.0 V to 6.0 V referenced to GND; absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND) VCC -0.5 7 V DC Supply Voltage (Referenced to GND) 2
DC Input Voltage (Referenced to GND) Vin -0.5 V DC Input Voltage (Referenced to GND); max printed as VCC + 0.5 2
DC Output Voltage (Referenced to GND) Vout -0.5 V DC Output Voltage (Referenced to GND); max printed as VCC + 0.5 2
DC Input Current, per Pin Iin -20 20 mA DC Input Current, per Pin 2
DC Output Current, per Pin Iout -25 25 mA DC Output Current, per Pin 2
DC Supply Current, VCC and GND Pins ICC -50 50 mA DC Supply Current, VCC and GND Pins 2
Power Dissipation in Still Air, TSSOP Package PD 450 mW Power Dissipation in Still Air, TSSOP Package 2
Storage Temperature Tstg -65 150 °C Storage Temperature 2
Lead Temperature, 1 mm from Case for 10 Seconds TL 260 °C Lead Temperature, 1 mm from Case for 10 Seconds, SOIC or TSSOP Package 2
DC Supply Voltage (Referenced to GND) VCC 2 6 V DC Supply Voltage (Referenced to GND) 2
DC Input Voltage, Output Voltage (Referenced to GND) Vin, Vout 0 V DC Input Voltage, Output Voltage (Referenced to GND); max printed as VCC 2
Operating Temperature, All Package Types TA -55 125 °C Operating Temperature, All Package Types 2
Input Rise and Fall Time tr, tf 0 1000 ns VCC = 2.0 V (Figure 1) 2
Input Rise and Fall Time tr, tf 0 500 ns VCC = 4.5 V (Figure 1) 2
Input Rise and Fall Time tr, tf 0 400 ns VCC = 6.0 V (Figure 1) 2
Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Input Voltage VIH 2.1 V VCC = 3.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Input Voltage VIH 3.15 V VCC = 4.5 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Input Voltage VIH 4.2 V VCC = 6.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Maximum Low-Level Input Voltage VIL 0.5 V VCC = 2.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Maximum Low-Level Input Voltage VIL 0.9 V VCC = 3.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Maximum Low-Level Input Voltage VIL 1.35 V VCC = 4.5 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Maximum Low-Level Input Voltage VIL 1.8 V VCC = 6.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Output Voltage VOH 1.9 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Output Voltage VOH 4.4 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Output Voltage VOH 5.9 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Minimum High-Level Output Voltage VOH 2.2 V VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4mA; guaranteed limit ≤125°C 3
Minimum High-Level Output Voltage VOH 3.7 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ ≤ 4.0mA; guaranteed limit ≤125°C 3
Minimum High-Level Output Voltage VOH 5.2 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ ≤ 5.2mA; guaranteed limit ≤125°C 3
Maximum Low-Level Output Voltage VOL 0.1 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ ≤ 20µA; guaranteed limit ≤125°C 3
Maximum Low-Level Output Voltage VOL 0.4 V VCC = 3.0 V; Vin = VIH or VIL; /Iout/ ≤ 2.4mA; guaranteed limit ≤125°C 3
Maximum Input Leakage Current Iin -1 0.1 1 µA Vin = VCC or GND; VCC = 6.0 V; guaranteed limit ≤125°C 3
Maximum Quiescent Supply Current (per Package) ICC 1 40 µA Vin = VCC or GND; Iout = 0A; VCC = 6.0 V; guaranteed limit ≤125°C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 110 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 2.0 V; ≤125°C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 55 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 3.0 V; ≤125°C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 22 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 4.5 V; ≤125°C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 19 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 6.0 V; ≤125°C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 110 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 2.0 V; ≤125°C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 36 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 3.0 V; ≤125°C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 22 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 4.5 V; ≤125°C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 19 ns CL = 50 pF, Input tr = tf = 6 ns; VCC = 6.0 V; ≤125°C 3
Maximum Input Capacitance Cin 10 10 pF 3

CAD (KiCad official)

  • Symbol: MC74HC00ADTR2G
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mc74hc00adtr2g-etched.step / mc74hc00adtr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc00adtr2g.step / mc74hc00adtr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 cd92f6aaf917d1f7, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF