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Contents

README

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MC74HC00ADG

onsemi · Logic Gates · SOIC-14

MC74HC00ADG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Input A of NAND gate 1 (Y1 = A1·B1); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
2 B1 input Input B of NAND gate 1 (Y1 = A1·B1); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
3 Y1 output Output of NAND gate 1 (Y1 = A1·B1); DC output current is rated at ±25 mA per pin.
4 A2 input Input A of NAND gate 2 (Y2 = A2·B2); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
5 B2 input Input B of NAND gate 2 (Y2 = A2·B2); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
6 Y2 output Output of NAND gate 2 (Y2 = A2·B2); DC output current is rated at ±25 mA per pin.
7 GND power_in Ground reference for the device; all DC supply and input/output voltages are referenced to this pin.
8 Y3 output Output of NAND gate 3 (Y3 = A3·B3); DC output current is rated at ±25 mA per pin.
9 A3 input Input A of NAND gate 3 (Y3 = A3·B3); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
10 B3 input Input B of NAND gate 3 (Y3 = A3·B3); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
11 Y4 output Output of NAND gate 4 (Y4 = A4·B4); DC output current is rated at ±25 mA per pin.
12 A4 input Input A of NAND gate 4 (Y4 = A4·B4); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
13 B4 input Input B of NAND gate 4 (Y4 = A4·B4); Vin must stay between GND and VCC, and unused inputs must be tied to GND or VCC.
14 VCC power_in Positive supply; the datasheet recommends a DC supply of 2.0 V to 6.0 V referenced to GND (absolute maximum −0.5 V to +7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND) VCC -0.5 7 V Referenced to GND 2
DC Input Voltage (Referenced to GND) Vin -0.5 V Referenced to GND; upper limit printed as VCC + 0.5 2
DC Output Voltage (Referenced to GND) Vout -0.5 V Referenced to GND; upper limit printed as VCC + 0.5 2
DC Input Current, per Pin Iin -20 20 mA 2
DC Output Current, per Pin Iout -25 25 mA 2
DC Supply Current, VCC and GND Pins ICC -50 50 mA 2
Power Dissipation in Still Air, SOIC Package PD 500 mW Still air, SOIC package 2
Storage Temperature Tstg -65 150 C 2
Lead Temperature, 1 mm from Case for 10 Seconds TL 260 C SOIC or TSSOP package, 1 mm from case for 10 s 2
DC Supply Voltage (Referenced to GND) VCC 2 6 V Referenced to GND 2
DC Input Voltage, Output Voltage (Referenced to GND) Vin, Vout 0 V Referenced to GND; upper limit printed as VCC 2
Operating Temperature, All Package Types TA -55 125 C All package types 2
Input Rise and Fall Time tr, tf 0 1000 ns VCC = 2.0 V (Figure 1) 2
Input Rise and Fall Time tr, tf 0 500 ns VCC = 4.5 V (Figure 1) 2
Input Rise and Fall Time tr, tf 0 400 ns VCC = 6.0 V (Figure 1) 2
Minimum High-Level Input Voltage VIH 1.5 V VCC = 2.0 V; Vout = 0.1V or VCC -0.1V; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Input Voltage VIH 2.1 V VCC = 3.0 V; Vout = 0.1V or VCC -0.1V; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Input Voltage VIH 3.15 V VCC = 4.5 V; Vout = 0.1V or VCC -0.1V; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Input Voltage VIH 4.2 V VCC = 6.0 V; Vout = 0.1V or VCC -0.1V; /Iout/ <= 20A; limit at <=125C 3
Maximum Low-Level Input Voltage VIL 0.5 V VCC = 2.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ <= 20A; limit at <=125C 3
Maximum Low-Level Input Voltage VIL 0.9 V VCC = 3.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ <= 20A; limit at <=125C 3
Maximum Low-Level Input Voltage VIL 1.35 V VCC = 4.5 V; Vout = 0.1V or VCC - 0.1V; /Iout/ <= 20A; limit at <=125C 3
Maximum Low-Level Input Voltage VIL 1.8 V VCC = 6.0 V; Vout = 0.1V or VCC - 0.1V; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Output Voltage VOH 1.9 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Output Voltage VOH 4.4 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Output Voltage VOH 5.9 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ <= 20A; limit at <=125C 3
Minimum High-Level Output Voltage VOH 2.2 V VCC = 3.0 V; Vin = VIH or VIL; /Iout/ <= 2.4mA; limit at <=125C 3
Minimum High-Level Output Voltage VOH 3.7 V VCC = 4.5 V; Vin = VIH or VIL; /Iout/ <= 4.0mA; limit at <=125C 3
Minimum High-Level Output Voltage VOH 5.2 V VCC = 6.0 V; Vin = VIH or VIL; /Iout/ <= 5.2mA; limit at <=125C 3
Maximum Low-Level Output Voltage VOL 0.1 V VCC = 2.0 V; Vin = VIH or VIL; /Iout/ <= 20A; limit at <=125C 3
Maximum Low-Level Output Voltage VOL 0.4 V VCC = 3.0 V; Vin = VIH or VIL; /Iout/ <= 2.4mA; limit at <=125C 3
Maximum Input Leakage Current Iin -1 1 µA VCC = 6.0 V; Vin = VCC or GND; limit at <=125C 3
Maximum Quiescent Supply Current (per Package) ICC 40 µA VCC = 6.0 V; Vin = VCC or GND; Iout = 0A; limit at <=125C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 110 ns VCC = 2.0 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 55 ns VCC = 3.0 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 22 ns VCC = 4.5 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Propagation Delay, Input A or B to Output Y tPLH, tPHL 19 ns VCC = 6.0 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 110 ns VCC = 2.0 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 36 ns VCC = 3.0 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 22 ns VCC = 4.5 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Output Transition Time, Any Output tTLH, tTHL 19 ns VCC = 6.0 V; CL = 50 pF, Input tr = tf = 6 ns (Figures 1 and 2); limit at <=125C 3
Maximum Input Capacitance Cin 10 pF 3

CAD (KiCad official)

  • Symbol: MC74HC00ADG
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74hc00adg-etched.step / mc74hc00adg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc00adg.step / mc74hc00adg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 cd92f6aaf917d1f7, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF