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MC74ACT04DR2G

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by adom

onsemi Inverters, SOIC-14. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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MC74ACT04DR2G

onsemi · Inverters · SOIC-14

MC74ACT04DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Inverter 1 input; the ACT04 has TTL-compatible inputs (VIH min 2.0 V, VIL max 0.8 V).
2 1Y output Inverter 1 output; sources/sinks 24 mA.
3 2A input Inverter 2 input; the ACT04 has TTL-compatible inputs (VIH min 2.0 V, VIL max 0.8 V).
4 2Y output Inverter 2 output; sources/sinks 24 mA.
5 3A input Inverter 3 input; the ACT04 has TTL-compatible inputs (VIH min 2.0 V, VIL max 0.8 V).
6 3Y output Inverter 3 output; sources/sinks 24 mA.
7 GND power_in Ground (0 V reference for input and output voltages).
8 4Y output Inverter 4 output; sources/sinks 24 mA.
9 4A input Inverter 4 input; the ACT04 has TTL-compatible inputs (VIH min 2.0 V, VIL max 0.8 V).
10 5Y output Inverter 5 output; sources/sinks 24 mA.
11 5A input Inverter 5 input; the ACT04 has TTL-compatible inputs (VIH min 2.0 V, VIL max 0.8 V).
12 6Y output Inverter 6 output; sources/sinks 24 mA.
13 6A input Inverter 6 input; the ACT04 has TTL-compatible inputs (VIH min 2.0 V, VIL max 0.8 V).
14 VCC power_in Positive supply; recommended 4.5 V to 5.5 V for the ACT device, absolute maximum -0.5 to 7.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum High Level Input Voltage VIH 2 1.5 V VCC = 4.5 V; VOUT = 0.1 V or VCC − 0.1 V 4
Maximum Low Level Input Voltage VIL 1.5 0.8 V VCC = 4.5 V; VOUT = 0.1 V or VCC − 0.1 V 4
Minimum High Level Output Voltage VOH 4.4 4.49 V VCC = 4.5 V; IOUT = −50 µA 4
Minimum High Level Output Voltage VOH 5.4 5.49 V VCC = 5.5 V; IOUT = −50 µA 4
Minimum High Level Output Voltage VOH 3.76 V VCC = 4.5 V; VIN = VIL or VIH; IOH = −24 mA 4
Minimum High Level Output Voltage VOH 4.76 V VCC = 5.5 V; VIN = VIL or VIH; IOH = −24 mA 4
Maximum Low Level Output Voltage VOL 0.001 0.1 V VCC = 4.5 V; IOUT = 50 µA 4
Maximum Low Level Output Voltage VOL 0.44 V VCC = 4.5 V; VIN = VIL or VIH; IOL = 24 mA 4
Maximum Input Leakage Current IIN -1 1 µA VCC = 5.5 V; VI = VCC, GND 4
Additional Max. ICC/Input ICCT 0.6 1.5 mA VCC = 5.5 V; VI = VCC − 2.1 V 4
Minimum Dynamic Output Current (low) IOLD 75 mA VCC = 5.5 V; VOLD = 1.65 V Max 4
Minimum Dynamic Output Current (high) IOHD -75 mA VCC = 5.5 V; VOHD = 3.85 V Min 4
Maximum Quiescent Supply Current ICC 40 µA VCC = 5.5 V; VIN = VCC or GND 4
DC Supply Voltage (ACT) VCC 4.5 5 5.5 V 2
DC Input Voltage, Output Voltage (Ref. to GND) Vin, Vout 0 V 2
Operating Ambient Temperature Range TA -40 25 85 °C 2
Output Current − High IOH -24 mA 2
Output Current − Low IOL 24 mA 2
DC Supply Voltage VCC -0.5 7 V 2
DC Input Voltage VI -0.5 V 2
DC Output Voltage (Note 1) VO -0.5 V 2
DC Input Diode Current IIK 20 mA 2
DC Output Diode Current IOK 50 mA 2
DC Output Sink/Source Current IO 50 mA 2
DC Supply Current per Output Pin ICC 50 mA 2
DC Ground Current per Output Pin IGND 50 mA 2
Storage Temperature Range TSTG -65 150 °C 2
Lead temperature TL 260 °C 1 mm from case for 10 seconds 2
Junction temperature under bias TJ 150 °C 2
ESD Withstand Voltage, Human Body Model VESD 2000 V Human Body Model (Note 3) 2
ESD Withstand Voltage, Machine Model VESD 200 V Machine Model (Note 4) 2
ESD Withstand Voltage, Charged Device Model VESD 1000 V Charged Device Model (Note 5) 2
Latch-Up Performance ILatch-Up 100 mA Above VCC and below GND at 85°C (Note 6) 2
Propagation Delay tPLH tPLH 1 9 ns VCC = 5.0 V; CL = 50 pF; TA = −40°C to +85°C 4
Propagation Delay tPHL tPHL 1 8.5 ns VCC = 5.0 V; CL = 50 pF; TA = −40°C to +85°C 4
Input Rise and Fall Time (ACT, except Schmitt inputs) tr, tf 10 ns/V VCC @ 4.5 V (Vin from 0.8 V to 2.0 V, Note 2) 2
Input Rise and Fall Time (ACT, except Schmitt inputs) tr, tf 8 ns/V VCC @ 5.5 V (Vin from 0.8 V to 2.0 V, Note 2) 2
Thermal Resistance, Junction-to-Ambient θJA 125 °C/W SOIC package (JESD51-7, Note 2) 2
Power Dissipation in Still Air at 85°C PD 520 mW SOIC package; still air at 85°C 2

CAD (KiCad official)

  • Symbol: MC74ACT04DR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74act04dr2g-etched.step / mc74act04dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74act04dr2g.step / mc74act04dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 3c01de85b0778bed, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF