MC74ACT02DTR2G

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  "slug": "mc74act02dtr2g",
  "title": "MC74ACT02DTR2G",
  "brief": "onsemi Logic Gates, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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  "component": {
    "mpn": "MC74ACT02DTR2G",
    "manufacturer": "onsemi",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589838383956078592",
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      "lbr": "mc74act02dtr2g.lbr"
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1Y",
        "type": "output",
        "description": "Output of NOR gate 1. Push-pull CMOS output; drives HIGH when both 1A and 1B are LOW. IOH/IOL = -24 mA/+24 mA at VCC = 4.5 V."
      },
      {
        "number": "2",
        "name": "1A",
        "type": "input",
        "description": "Input A of NOR gate 1. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "3",
        "name": "1B",
        "type": "input",
        "description": "Input B of NOR gate 1. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "4",
        "name": "2Y",
        "type": "output",
        "description": "Output of NOR gate 2. Push-pull CMOS output; drives HIGH when both 2A and 2B are LOW. IOH/IOL = -24 mA/+24 mA at VCC = 4.5 V."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Input A of NOR gate 2. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "6",
        "name": "2B",
        "type": "input",
        "description": "Input B of NOR gate 2. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). All input/output voltages are referenced to this pin. Bypass VCC to GND with a local decoupling capacitor."
      },
      {
        "number": "8",
        "name": "3A",
        "type": "input",
        "description": "Input A of NOR gate 3. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "9",
        "name": "3B",
        "type": "input",
        "description": "Input B of NOR gate 3. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "10",
        "name": "3Y",
        "type": "output",
        "description": "Output of NOR gate 3. Push-pull CMOS output; drives HIGH when both 3A and 3B are LOW. IOH/IOL = -24 mA/+24 mA at VCC = 4.5 V."
      },
      {
        "number": "11",
        "name": "4A",
        "type": "input",
        "description": "Input A of NOR gate 4. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "12",
        "name": "4B",
        "type": "input",
        "description": "Input B of NOR gate 4. TTL-compatible input (VIH >= 2.0 V, VIL <= 0.8 V at VCC = 4.5-5.5 V). Input leakage +/-1.0 uA max."
      },
      {
        "number": "13",
        "name": "4Y",
        "type": "output",
        "description": "Output of NOR gate 4. Push-pull CMOS output; drives HIGH when both 4A and 4B are LOW. IOH/IOL = -24 mA/+24 mA at VCC = 4.5 V."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply input. ACT operating range 4.5-5.5 V (5.0 V typical). Absolute maximum 7.0 V. Quiescent ICC = 40 uA max at VCC = 5.5 V; bypass locally to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
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        "pages": 9,
        "sha256": "04b57f3cbb7d2b96",
        "source_tier": "lcsc"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
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    },
    "viewers": {
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    "logic": {
      "family_id": "74ACT02",
      "logic_family": "74ACT",
      "function_code": "02",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NOR Gate",
      "manufacturer": "Onsemi (Motorola legacy)",
      "is_specialty": false
    },
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        "checked": "2026-10-07",
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "onsemi",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "variants": [
    {
      "mpn": "MC74ACT02DTR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC74ACT02DTR2GDG",
      "kind": "packaging"
    },
    {
      "mpn": "MC74ACT02DTR2GDR2G",
      "kind": "packaging"
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  "discovery_pitch": "MC74ACT02DTR2G (onsemi) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
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  "updated_at": "2026-09-28T18:50:28.712Z"
}