component

MC74ACT00DG

Public Made by Adom

by adom

onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmc74act00dgfactory-2.0.0extractor-text

Verified MC74ACT00DG

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MC74ACT00DG · SOIC-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 8-page datasheet
  • ✓distributor: lcsc C457771, digikey 2156-MC74ACT00DG-OS-ND, mouser 863-MC74ACT00DG
  • ✓family: SOIC-14_3.9x8.7mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-x3k0djfo/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.6)
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mc74act00dg.kicad_sym✓ mc74act00dg.kicad_mod✓ mc74act00dg.step
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Ray Publish 0.1.0 a3126d9 5h ago

MC74ACT00DG

onsemi · Gates · SOIC-14

MC74ACT00DG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Gate 1 input A; Y1 = NOT(A1·B1), low input current of 1.0 µA max.
2 B1 input Gate 1 input B; Y1 = NOT(A1·B1), ACT00 VIH min 2.0 V and VIL max 0.8 V.
3 Y1 output Gate 1 NAND output, drives ±24 mA (IOH −24 mA / IOL 24 mA).
4 A2 input Gate 2 input A; Y2 = NOT(A2·B2), input voltage range 0 to VCC.
5 B2 input Gate 2 input B; Y2 = NOT(A2·B2), input voltage range 0 to VCC.
6 Y2 output Gate 2 NAND output, drives ±24 mA (IOH −24 mA / IOL 24 mA).
7 GND power_in Ground (0 V) reference for the device.
8 Y3 output Gate 3 NAND output, drives ±24 mA (IOH −24 mA / IOL 24 mA).
9 A3 input Gate 3 input A; Y3 = NOT(A3·B3), input voltage range 0 to VCC.
10 B3 input Gate 3 input B; Y3 = NOT(A3·B3), input voltage range 0 to VCC.
11 Y4 output Gate 4 NAND output, drives ±24 mA (IOH −24 mA / IOL 24 mA).
12 A4 input Gate 4 input A; Y4 = NOT(A4·B4), input voltage range 0 to VCC.
13 B4 input Gate 4 input B; Y4 = NOT(A4·B4), input voltage range 0 to VCC.
14 VCC power_in Positive supply; 4.5 to 5.5 V for MC74ACT00 (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (MC74ACT00) VCC 4.5 5 5.5 V 2
Operating Ambient Temperature Range TA -55 25 125 °C 2
Output Current - High IOH -24 mA 2
Output Current - Low IOL 24 mA 2
Junction Temperature TJ 150 °C 2
DC Supply Voltage VCC -0.5 7 V 2
DC Input Diode Current IIK 20 mA 2
DC Output Diode Current IOK 50 mA 2
DC Output Sink/Source Current IO 50 mA 2
DC Supply Current per Output Pin ICC 50 mA 2
DC Ground Current per Output Pin IGND 50 mA 2
Storage Temperature Range TSTG -65 150 °C 2
Lead temperature TL 260 °C 1 mm from Case for 10 Seconds 2
Junction temperature under Bias TJ 150 °C 2
Thermal Resistance θJA 125 °C/W SOIC; JESD51-7 2
Latch-Up Performance ILatch-Up 100 mA Above VCC and Below GND at 85°C 2
Minimum High Level Input Voltage VIH 2 1.5 V VCC=4.5 V; VOUT = 0.1 V or VCC − 0.1 V; all temperature columns 4
Maximum Low Level Input Voltage VIL 1.5 0.8 V VCC=4.5 V; VOUT = 0.1 V or VCC − 0.1 V; all temperature columns 4
Minimum High Level Output Voltage VOH 4.4 4.49 V VCC=4.5 V; IOUT = −50 µA; all temperature columns 4
Minimum High Level Output Voltage VOH 5.4 5.49 V VCC=5.5 V; IOUT = −50 µA; all temperature columns 4
Minimum High Level Output Voltage VOH 3.86 V VCC=4.5 V; VIN = VIL or VIH; IOH −24 mA; TA = +25°C 4
Minimum High Level Output Voltage VOH 3.76 V VCC=4.5 V; VIN = VIL or VIH; IOH −24 mA; TA = −40°C to +85°C 4
Minimum High Level Output Voltage VOH 3.7 V VCC=4.5 V; VIN = VIL or VIH; IOH −24 mA; TA = −55°C to +125°C 4
Minimum High Level Output Voltage VOH 4.86 V VCC=5.5 V; VIN = VIL or VIH; IOH −24 mA; TA = +25°C 4
Minimum High Level Output Voltage VOH 4.76 V VCC=5.5 V; VIN = VIL or VIH; IOH −24 mA; TA = −40°C to +85°C 4
Minimum High Level Output Voltage VOH 4.7 V VCC=5.5 V; VIN = VIL or VIH; IOH −24 mA; TA = −55°C to +125°C 4
Maximum Low Level Output Voltage VOL 0.001 0.1 V VCC=4.5 V; IOUT = 50 µA; all temperature columns 4
Maximum Low Level Output Voltage VOL 0.36 V VCC=4.5 V; VIN = VIL or VIH; IOL 24 mA; TA = +25°C 4
Maximum Low Level Output Voltage VOL 0.44 V VCC=4.5 V; VIN = VIL or VIH; IOL 24 mA; TA = −40°C to +85°C 4
Maximum Low Level Output Voltage VOL 0.5 V VCC=4.5 V; VIN = VIL or VIH; IOL 24 mA; TA = −55°C to +125°C 4
Maximum Input Leakage Current IIN 0.1 µA VCC=5.5 V; VI = VCC, GND; TA = +25°C 4
Maximum Input Leakage Current IIN 1 µA VCC=5.5 V; VI = VCC, GND; TA = −40°C to +85°C 4
Additional Max. ICC/Input ICCT 0.6 1.5 mA VCC=5.5 V; VI = VCC − 2.1 V; TA = −40°C to +85°C 4
Additional Max. ICC/Input ICCT 0.6 1.6 mA VCC=5.5 V; VI = VCC − 2.1 V; TA = −55°C to +125°C 4
Minimum Dynamic Output Current IOLD 75 mA VCC=5.5 V; VOLD = 1.65 V Max; TA = −40°C to +85°C 4
Minimum Dynamic Output Current IOLD 50 mA VCC=5.5 V; VOLD = 1.65 V Max; TA = −55°C to +125°C 4
Minimum Dynamic Output Current IOHD -75 mA VCC=5.5 V; VOHD = 3.85 V Min; TA = −40°C to +85°C 4
Minimum Dynamic Output Current IOHD -50 mA VCC=5.5 V; VOHD = 3.85 V Min; TA = −55°C to +125°C 4
Maximum Quiescent Supply Current ICC 4 µA VCC=5.5 V; VIN = VCC or GND; TA = +25°C 4
Maximum Quiescent Supply Current ICC 40 µA VCC=5.5 V; VIN = VCC or GND; TA = −40°C to +85°C 4
Propagation Delay tPLH 1.5 5.5 9 ns VCC=5.0 V; CL = 50 pF; TA = +25°C 4
Propagation Delay tPLH 1 9.5 ns VCC=5.0 V; CL = 50 pF; TA = −40°C to +85°C 4
Propagation Delay tPHL 1.5 4 7 ns VCC=5.0 V; CL = 50 pF; TA = +25°C 4
Propagation Delay tPHL 1 8 ns VCC=5.0 V; CL = 50 pF; TA = −40°C to +85°C 4
Input Capacitance CIN 4.5 pF VCC = 5.0 V 4
Power Dissipation Capacitance CPD 30 pF VCC = 5.0 V 4

CAD (KiCad official)

  • Symbol: MC74ACT00DG
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74act00dg-etched.step / mc74act00dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74act00dg.step / mc74act00dg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 0f76f98125cdc3d4, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF