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MC74AC74DR2G

Public Made by Adom

by adom

onsemi Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

markdown

MC74AC74DR2G

onsemi · Flip Flops · SOIC-14

MC74AC74DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CD1 input Direct Clear input for flip-flop 1; a LOW input sets Q1 LOW independently of the clock.
2 D1 input Data input for flip-flop 1, transferred to the outputs on the positive clock edge.
3 CP1 input Clock pulse input for flip-flop 1; data is transferred on the LOW-to-HIGH transition.
4 SD1 input Direct Set input for flip-flop 1; a LOW input sets Q1 HIGH independently of the clock.
5 Q1 output True output of flip-flop 1; outputs source/sink 24 mA.
6 ~Q1 output Complementary output of flip-flop 1; outputs source/sink 24 mA.
7 GND power_in Ground reference for the device.
8 ~Q2 output Complementary output of flip-flop 2; outputs source/sink 24 mA.
9 Q2 output True output of flip-flop 2; outputs source/sink 24 mA.
10 SD2 input Direct Set input for flip-flop 2; a LOW input sets Q2 HIGH independently of the clock.
11 CP2 input Clock pulse input for flip-flop 2; data is transferred on the LOW-to-HIGH transition.
12 D2 input Data input for flip-flop 2, transferred to the outputs on the positive clock edge.
13 CD2 input Direct Clear input for flip-flop 2; a LOW input sets Q2 LOW independently of the clock.
14 VCC power_in Supply voltage: 2.0 to 6.0 V for 74AC devices and 4.5 to 5.5 V for 74ACT devices.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (74AC) VCC 2 5 6 V 'AC devices 3
DC Input/Output Voltage Vin, Vout 0 V Ref. to GND 3
Operating Ambient Temperature Range TA -40 25 85 °C 3
Output Current High IOH -24 mA 3
Output Current Low IOL 24 mA 3
DC Supply Voltage VCC -0.5 7 V 3
DC Input Diode Current IIK 20 mA 3
DC Output Diode Current IOK 50 mA 3
DC Output Sink/Source Current IO 50 mA IO absolute maximum rating must be observed 3
DC Supply Current per Output Pin ICC 50 mA 3
DC Ground Current per Output Pin IGND 50 mA 3
Storage Temperature Range TSTG -65 150 °C 3
Lead Temperature TL 260 °C 1 mm from case for 10 seconds 3
Junction Temperature under Bias TJ 150 °C 3
Minimum High Level Input Voltage VIH 2.1 1.5 V VCC=3.0 V; VOUT=0.1 V or VCC-0.1 V; TA=-40 to +85 °C 4
Minimum High Level Input Voltage VIH 3.15 2.25 V VCC=4.5 V; VOUT=0.1 V or VCC-0.1 V; TA=-40 to +85 °C 4
Minimum High Level Input Voltage VIH 3.85 2.75 V VCC=5.5 V; VOUT=0.1 V or VCC-0.1 V; TA=-40 to +85 °C 4
Maximum Low Level Input Voltage VIL 1.5 0.9 V VCC=3.0 V; VOUT=0.1 V or VCC-0.1 V; TA=-40 to +85 °C 4
Maximum Low Level Input Voltage VIL 2.25 1.35 V VCC=4.5 V; VOUT=0.1 V or VCC-0.1 V; TA=-40 to +85 °C 4
Maximum Low Level Input Voltage VIL 2.75 1.65 V VCC=5.5 V; VOUT=0.1 V or VCC-0.1 V; TA=-40 to +85 °C 4
Minimum High Level Output Voltage VOH 2.9 2.99 V VCC=3.0 V; IOUT=-50 µA; TA=-40 to +85 °C 4
Minimum High Level Output Voltage VOH 4.4 4.49 V VCC=4.5 V; IOUT=-50 µA; TA=-40 to +85 °C 4
Minimum High Level Output Voltage VOH 5.4 5.49 V VCC=5.5 V; IOUT=-50 µA; TA=-40 to +85 °C 4
Minimum High Level Output Voltage VOH 2.46 V VCC=3.0 V; IOH=-12 mA; VIN=VIL or VIH; TA=-40 to +85 °C 4
Minimum High Level Output Voltage VOH 3.76 V VCC=4.5 V; IOH=-24 mA; VIN=VIL or VIH; TA=-40 to +85 °C 4
Minimum High Level Output Voltage VOH 4.76 V VCC=5.5 V; IOH=-24 mA; VIN=VIL or VIH; TA=-40 to +85 °C 4
Maximum Low Level Output Voltage VOL 0.002 0.1 V VCC=3.0 V; IOUT=50 µA; TA=-40 to +85 °C 4
Maximum Low Level Output Voltage VOL 0.001 0.1 V VCC=4.5 V; IOUT=50 µA; TA=-40 to +85 °C 4
Maximum Low Level Output Voltage VOL 0.44 V VCC=3.0 V; IOL=12 mA; VIN=VIL or VIH; TA=-40 to +85 °C 4
Maximum Input Leakage Current IIN -1 1 µA VI = VCC, GND; VCC=5.5 V 4
Minimum Dynamic Output Current IOLD 75 mA VCC=5.5 V; VOLD = 1.65 V Max 4
Minimum Dynamic Output Current IOHD -75 mA VCC=5.5 V; VOHD = 3.85 V Min 4
Maximum Quiescent Supply Current ICC 40 µA VCC=5.5 V; VIN = VCC or GND 4
Maximum Clock Frequency fmax 95 125 MHz CL = 50 pF; VCC=3.3 V 4
Maximum Clock Frequency fmax 125 160 MHz CL = 50 pF; VCC=5.0 V 4
Propagation Delay CDn or SDn to Qn or Qn (LOW-to-HIGH) tPLH 4 8 13 ns CL = 50 pF; VCC=3.3 V 4
Propagation Delay CDn or SDn to Qn or Qn (LOW-to-HIGH) tPLH 3 6 10 ns CL = 50 pF; VCC=5.0 V 4
Propagation Delay CDn or SDn to Qn or Qn (HIGH-to-LOW) tPHL 3.5 10.5 13.5 ns CL = 50 pF; VCC=3.3 V 4
Propagation Delay CDn or SDn to Qn or Qn (HIGH-to-LOW) tPHL 2.5 8 10.5 ns CL = 50 pF; VCC=5.0 V 4
Propagation Delay CPn to Qn or Qn (LOW-to-HIGH) tPLH 4 8 16 ns CL = 50 pF; VCC=3.3 V 4
Propagation Delay CPn to Qn or Qn (LOW-to-HIGH) tPLH 3 6 10.5 ns CL = 50 pF; VCC=5.0 V 4
Propagation Delay CPn to Qn or Qn (HIGH-to-LOW) tPHL 3.5 8 14.5 ns CL = 50 pF; VCC=3.3 V 4
Propagation Delay CPn to Qn or Qn (HIGH-to-LOW) tPHL 2.5 6 10.5 ns CL = 50 pF; VCC=5.0 V 4
Set-up Time, HIGH or LOW Dn to CPn ts 4.5 1.5 ns CL = 50 pF; VCC=3.3 V 5
Set-up Time, HIGH or LOW Dn to CPn ts 3 1 ns CL = 50 pF; VCC=5.0 V 5
Hold Time, HIGH or LOW Dn to CPn th 0.5 -2 ns CL = 50 pF; VCC=3.3 V 5
Hold Time, HIGH or LOW Dn to CPn th 0.5 -1.5 ns CL = 50 pF; VCC=5.0 V 5
CPn or CDn or SDn Pulse Width tw 7 3 ns CL = 50 pF; VCC=3.3 V 5
CPn or CDn or SDn Pulse Width tw 5 2.5 ns CL = 50 pF; VCC=5.0 V 5
Recovery Time CDn or SDn to CP trec 0 -2.5 ns CL = 50 pF; VCC=3.3 V 5
Recovery Time CDn or SDn to CP trec 0 -2 ns CL = 50 pF; VCC=5.0 V 5
Thermal Resistance Junction-to-Ambient (SOIC) JA 125 °C/W SOIC package 3
Power Dissipation in Still Air at 85°C (SOIC) PD 125 mW SOIC package, still air at 85°C 3
Input Capacitance CIN 4.5 pF VCC = 5.0 V 7
Power Dissipation Capacitance CPD 35 pF VCC = 5.0 V 7

CAD (KiCad official)

  • Symbol: MC74AC74DR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74ac74dr2g-etched.step / mc74ac74dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74ac74dr2g.step / mc74ac74dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 84bb8c106e1f498e, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF