component
MC74AC573DWR2G
Public Made by Adomby adom
onsemi Buffer/Driver/Transceiver, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+118docs/hero.pngdocs/mc74ac573dwr2g-datasheet.pdf+3838mc74ac573dwr2g-etched.glbmc74ac573dwr2g-hero.glbmc74ac573dwr2g-hero.overlay.json+524mc74ac573dwr2g.glbmc74ac573dwr2g.kicad_mod+372mc74ac573dwr2g.kicad_sym+93mc74ac573dwr2g.lbr+166mc74ac573dwr2g.step+6626package.json+264page.json+270viewers/footprint.html+1viewers/symbol.html+1README.mdadded+118@@ -0,0 +1,118 @@+# MC74AC573DWR2G++**onsemi** · Buffer/Driver/Transceiver · SOIC-20-300mil++MC74AC573DWR2G from onsemi, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE | input | 3-state output enable input; LOW enables the outputs, HIGH puts them in high impedance without affecting latch data entry. |+| 2 | D0 | input | Data input 0, enters the latch when LE is HIGH. |+| 3 | D1 | input | Data input 1, enters the latch when LE is HIGH. |+| 4 | D2 | input | Data input 2, enters the latch when LE is HIGH. |+| 5 | D3 | input | Data input 3, enters the latch when LE is HIGH. |+| 6 | D4 | input | Data input 4, enters the latch when LE is HIGH. |+| 7 | D5 | input | Data input 5, enters the latch when LE is HIGH. |+| 8 | D6 | input | Data input 6, enters the latch when LE is HIGH. |+| 9 | D7 | input | Data input 7, enters the latch when LE is HIGH. |+| 10 | GND | power_in | Ground reference for supply and all voltages. |+| 11 | LE | input | Latch enable input; HIGH makes latches transparent, LOW stores the data present at the HIGH-to-LOW transition. |+| 12 | O7 | tri_state | 3-state latch output 7, sources/sinks 24 mA. |+| 13 | O6 | tri_state | 3-state latch output 6, sources/sinks 24 mA. |+| 14 | O5 | tri_state | 3-state latch output 5, sources/sinks 24 mA. |+| 15 | O4 | tri_state | 3-state latch output 4, sources/sinks 24 mA. |+| 16 | O3 | tri_state | 3-state latch output 3, sources/sinks 24 mA. |+| 17 | O2 | tri_state | 3-state latch output 2, sources/sinks 24 mA. |+| 18 | O1 | tri_state | 3-state latch output 1, sources/sinks 24 mA. |+| 19 | O0 | tri_state | 3-state latch output 0, sources/sinks 24 mA. |+| 20 | VCC | power_in | Positive supply; 2.0 to 6.0 V for AC, 4.5 to 5.5 V for ACT (absolute maximum 7.0 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-20-300mil |+| Category | Logic ICs |+| Pins | 20 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| DC Supply Voltage | VCC | -0.5 | | 7 | V | Referenced to GND | 3 |+| DC Input Voltage | VIN | -0.5 | | 5.5 | V | -0.5 to VCC +0.5 V | 3 |+| DC Output Voltage | VOUT | -0.5 | | 5.5 | V | -0.5 to VCC +0.5 V | 3 |+| DC Input Diode Current | IIK | -20 | | 20 | mA | ±20 mA | 3 |+| DC Output Diode Current | IOK | -50 | | 50 | mA | ±50 mA | 3 |+| DC Output Sink/Source Current | IOUT | -50 | | 50 | mA | ±50 mA | 3 |+| DC Supply Current, per Output Pin | ICC | -50 | | 50 | mA | ±50 mA | 3 |+| DC Ground Current, per Output Pin | IGND | -100 | | 100 | mA | ±100 mA | 3 |+| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 3 |+| Lead Temperature | TL | | | 260 | °C | 1 mm from case for 10 seconds | 3 |+| Junction Temperature Under Bias | TJ | | | 140 | °C | | 3 |+| Thermal Resistance, SOIC | θJA | | 65.8 | | °C/W | SOIC, JESD 51-7 | 3 |+| Supply Voltage | VCC | 2 | 5 | 6 | V | 'AC | 3 |+| DC Input Voltage, Output Voltage | VIN, VOUT | 0 | | | V | 0 to VCC (Ref. to GND) | 3 |+| Operating Ambient Temperature Range | TA | -40 | 25 | 85 | °C | | 3 |+| Output Current - High | IOH | | | -24 | mA | | 3 |+| Output Current - Low | IOL | | | 24 | mA | | 3 |+| Minimum High Level Input Voltage | VIH | 2.1 | 1.5 | | V | VCC = 3.0 V, VOUT = 0.1 V or VCC − 0.1 V | 4 |+| Minimum High Level Input Voltage | VIH | 3.15 | 2.25 | | V | VCC = 4.5 V, VOUT = 0.1 V or VCC − 0.1 V | 4 |+| Minimum High Level Input Voltage | VIH | 3.85 | 2.75 | | V | VCC = 5.5 V, VOUT = 0.1 V or VCC − 0.1 V | 4 |+| Maximum Low Level Input Voltage | VIL | | 1.5 | 0.9 | V | VCC = 3.0 V, VOUT = 0.1 V or VCC − 0.1 V | 4 |+| Maximum Low Level Input Voltage | VIL | | 2.25 | 1.35 | V | VCC = 4.5 V, VOUT = 0.1 V or VCC − 0.1 V | 4 |+| Maximum Low Level Input Voltage | VIL | | 2.75 | 1.65 | V | VCC = 5.5 V, VOUT = 0.1 V or VCC − 0.1 V | 4 |+| Minimum High Level Output Voltage | VOH | 2.9 | 2.99 | | V | VCC = 3.0 V, IOUT = -50 µA | 4 |+| Minimum High Level Output Voltage | VOH | 4.4 | 4.49 | | V | VCC = 4.5 V, IOUT = -50 µA | 4 |+| Minimum High Level Output Voltage | VOH | 5.4 | 5.49 | | V | VCC = 5.5 V, IOUT = -50 µA | 4 |+| Minimum High Level Output Voltage | VOH | 2.56 | | | V | TA = +25°C, VCC = 3.0 V, VIN = VIL or VIH, IOH = -12 mA | 4 |+| Minimum High Level Output Voltage | VOH | 3.86 | | | V | TA = +25°C, VCC = 4.5 V, VIN = VIL or VIH, IOH = -24 mA | 4 |+| Minimum High Level Output Voltage | VOH | 4.86 | | | V | TA = +25°C, VCC = 5.5 V, VIN = VIL or VIH, IOH = -24 mA | 4 |+| Minimum High Level Output Voltage | VOH | 2.46 | | | V | TA = -40°C to +85°C, VCC = 3.0 V, VIN = VIL or VIH, IOH = -12 mA | 4 |+| Minimum High Level Output Voltage | VOH | 3.76 | | | V | TA = -40°C to +85°C, VCC = 4.5 V, VIN = VIL or VIH, IOH = -24 mA | 4 |+| Minimum High Level Output Voltage | VOH | 4.76 | | | V | TA = -40°C to +85°C, VCC = 5.5 V, VIN = VIL or VIH, IOH = -24 mA | 4 |+| Maximum Low Level Output Voltage | VOL | | 0.002 | 0.1 | V | VCC = 3.0 V, IOUT = 50 µA | 4 |+| Maximum Low Level Output Voltage | VOL | | 0.001 | 0.1 | V | VCC = 4.5 V, IOUT = 50 µA | 4 |+| Maximum Low Level Output Voltage | VOL | | | 0.36 | V | TA = +25°C, VCC = 3.0 V, VIN = VIL or VIH, IOL = 12 mA | 4 |+| Maximum Low Level Output Voltage | VOL | | | 0.44 | V | TA = -40°C to +85°C, VCC = 3.0 V, VIN = VIL or VIH, IOL = 12 mA | 4 |+| Maximum Input Leakage Current | IIN | -0.1 | | 0.1 | µA | TA = +25°C, VCC = 5.5 V, VI = VCC, GND | 4 |+| Maximum Input Leakage Current | IIN | -1 | | 1 | µA | TA = -40°C to +85°C, VCC = 5.5 V, VI = VCC, GND | 4 |+| Maximum 3-State Current | IOZ | -0.5 | | 0.5 | µA | TA = +25°C, VCC = 5.5 V, VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND | 4 |+| Maximum 3-State Current | IOZ | -5 | | 5 | µA | TA = -40°C to +85°C, VCC = 5.5 V, VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND | 4 |+| Minimum Dynamic Output Current | IOLD | | | 75 | mA | TA = -40°C to +85°C, VCC = 5.5 V, VOLD = 1.65 V Max | 4 |+| Minimum Dynamic Output Current | IOHD | | | -75 | mA | TA = -40°C to +85°C, VCC = 5.5 V, VOHD = 3.85 V Min | 4 |+| Maximum Quiescent Supply Current | ICC | | | 8 | µA | TA = +25°C, VCC = 5.5 V, VIN = VCC or GND | 4 |+| Maximum Quiescent Supply Current | ICC | | | 80 | µA | TA = -40°C to +85°C, VCC = 5.5 V, VIN = VCC or GND | 4 |+| Propagation Delay Dn to On (LH) | tPLH | 2 | | 11.5 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Propagation Delay Dn to On (HL) | tPHL | 2 | | 11 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Propagation Delay LE to On (LH) | tPLH | 2 | | 11 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Propagation Delay LE to On (HL) | tPHL | 2 | | 10 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Output Enable Time | tPZH | 2 | | 10 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Output Enable Time | tPZL | 2 | | 9.5 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Output Disable Time | tPHZ | 2 | | 12 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Output Disable Time | tPLZ | 2 | | 9 | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Setup Time, HIGH or LOW Dn to LE | ts | 3.5 | | | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| Hold Time, HIGH or LOW Dn to LE | th | 2 | | | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |+| LE Pulse Width, HIGH | tw | 5 | | | ns | TA = -40°C to +85°C, VCC = 5.0 V, CL = 50 pF | 5 |++## CAD (KiCad official)++- Symbol: `MC74AC573DWR2G`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)+- 3D model files: `mc74ac573dwr2g-etched.step` / `mc74ac573dwr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc74ac573dwr2g.step` / `mc74ac573dwr2g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74ac573dwr2-d.pdf) (11 pp, sha256 `1ff43863058fe491`, retrieved 2026-10-22, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc74ac573dwr2g-datasheet.pdf)
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buffered common Latch Enable (LE) and buffered common Output
Enable (OE) inputs.
The MC74AC573/74ACT573 is functionally identical to the
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