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MC74AC4040DR2G

Public Made by Adom

by adom

onsemi Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74AC4040DR2G

onsemi · Counters, Dividers · SOIC-16

MC74AC4040DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q12 output Stage 12 binary ripple counter output, half the frequency of Q11; outputs source/sink 24 mA.
2 Q6 output Stage 6 binary ripple counter output, half the frequency of Q5; outputs source/sink 24 mA.
3 Q5 output Stage 5 binary ripple counter output, half the frequency of Q4; outputs source/sink 24 mA.
4 Q7 output Stage 7 binary ripple counter output, half the frequency of Q6; outputs source/sink 24 mA.
5 Q4 output Stage 4 binary ripple counter output, half the frequency of Q3; outputs source/sink 24 mA.
6 Q3 output Stage 3 binary ripple counter output, half the frequency of Q2; outputs source/sink 24 mA.
7 Q2 output Stage 2 binary ripple counter output, half the frequency of Q1; outputs source/sink 24 mA.
8 GND power_in Ground reference for the device; all voltages are referenced to this pin.
9 Q1 output Stage 1 binary ripple counter output, half the clock frequency; outputs source/sink 24 mA.
10 CLK input Clock input; the counter advances on the negative-going edge of this input.
11 RESET input Asynchronous active-high reset; a high level forces all Q outputs low.
12 Q9 output Stage 9 binary ripple counter output, half the frequency of Q8; outputs source/sink 24 mA.
13 Q8 output Stage 8 binary ripple counter output, half the frequency of Q7; outputs source/sink 24 mA.
14 Q10 output Stage 10 binary ripple counter output, half the frequency of Q9; outputs source/sink 24 mA.
15 Q11 output Stage 11 binary ripple counter output, half the frequency of Q10; outputs source/sink 24 mA.
16 VCC power_in Positive supply; operating voltage range 2.0 V to 6.0 V referenced to GND.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (Referenced to GND) VCC 2 6 V 3
Operating Temperature, All Package Types TA -40 85 °C 3
Input Rise/Fall Time tr/tf 0 150 ns/V VCC = 3.0 V (Figure 1) 3
Input Rise/Fall Time tr/tf 0 40 ns/V VCC = 4.5 V (Figure 1) 3
Input Rise/Fall Time tr/tf 0 25 ns/V VCC = 5.5 V (Figure 1) 3
DC Supply Voltage VCC -0.5 7 V 3
DC Input Diode Current IIK -20 20 mA 3
DC Output Diode Current IOK -50 50 mA 3
DC Output Sink/Source Current IO -50 50 mA 3
DC Supply Current per Output Pin ICC -50 50 mA 3
DC Ground Current per Output Pin IGND -50 50 mA 3
Storage Temperature Range TSTG -65 150 °C 3
Lead temperature TL 260 °C 1 mm from case for 10 seconds 3
Junction temperature under bias TJ 150 °C 3
ESD Withstand Voltage, Human Body Model VESD 2000 V Human Body Model (Note 4); printed as > 2000 V 3
ESD Withstand Voltage, Machine Model VESD 200 V Machine Model (Note 5); printed as > 200 V 3
ESD Withstand Voltage, Charged Device Model VESD 1000 V Charged Device Model (Note 6); printed as > 1000 V 3
Latch-Up Performance ILatch-Up -100 100 mA Above VCC and below GND at 85°C (Note 7) 3
Maximum Quiescent Supply Current (printed label: Maximum Quiescent Supply Voltage) ICC 80 A Vin = VCC or GND; VCC = 5.5 V, TA = Worst Case 4
Maximum Quiescent Supply Current ICC 8 A Vin = VCC or GND; VCC = 5.5 V, TA = 25°C 4
Minimum High Level Input Voltage VIH 2.1 V VCC = 3.0 V; VOUT = 0.1 V or VCC - 0.1 V 4
Minimum High Level Input Voltage VIH 3.15 V VCC = 4.5 V; VOUT = 0.1 V or VCC - 0.1 V 4
Minimum High Level Input Voltage VIH 3.85 V VCC = 5.5 V; VOUT = 0.1 V or VCC - 0.1 V 4
Maximum Low Level Input Voltage VIL 0.9 V VCC = 3.0 V; VOUT = 0.1 V or VCC - 0.1 V 4
Maximum Low Level Input Voltage VIL 1.35 V VCC = 4.5 V; VOUT = 0.1 V or VCC - 0.1 V 4
Maximum Low Level Input Voltage VIL 1.65 V VCC = 5.5 V; VOUT = 0.1 V or VCC - 0.1 V 4
Minimum High Level Output Voltage VOH 2.9 2.99 V VCC = 3.0 V; IOUT = -50 A 4
Minimum High Level Output Voltage VOH 4.4 4.49 V VCC = 4.5 V; IOUT = -50 A 4
Minimum High Level Output Voltage VOH 5.4 5.49 V VCC = 5.5 V; IOUT = -50 A 4
Minimum High Level Output Voltage VOH 2.46 V VIN = VIL or VIH; VCC = 3.0 V; IOH = -12 mA 4
Minimum High Level Output Voltage VOH 3.76 V VIN = VIL or VIH; VCC = 4.5 V; IOH = -24 mA 4
Minimum High Level Output Voltage VOH 4.76 V VIN = VIL or VIH; VCC = 5.5 V; IOH = -24 mA 4
Maximum Low Level Output Voltage VOL 0.002 0.1 V VCC = 3.0 V; IOUT = 50 A 4
Maximum Low Level Output Voltage VOL 0.001 0.1 V VCC = 4.5 V; IOUT = 50 A 4
Maximum Low Level Output Voltage VOL 0.44 V VIN = VIL or VIH; VCC = 3.0 V; IOL = 12 mA 4
Maximum Input Leakage Current IIN -1 1 A VI = VCC, GND; VCC = 5.5 V 4
Minimum Dynamic Output Current (low) IOLD 75 mA VOLD = 1.65 V Max; VCC = 5.5 V 4
Minimum Dynamic Output Current (high) IOHD -75 mA VOHD = 3.85 V Min; VCC = 5.5 V 4
Maximum Clock Frequency fmax 100 120 MHz VCC = 3.3 V; CL = 50 pF; min at TA = -40 to +85°C, typ at 25°C 5
Maximum Clock Frequency fmax 120 140 MHz VCC = 5.0 V; CL = 50 pF; min at TA = -40 to +85°C, typ at 25°C 5
nCP to Q1 Propagation Delay 2 14 ns VCC = 3.3 V; CL = 50 pF; TA = -40 to +85°C 5
nCP to Q1 Propagation Delay 2 10 ns VCC = 5.0 V; CL = 50 pF; TA = -40 to +85°C 5
Qn to Qn+1 Propagation Delay 0 6.5 ns VCC = 3.3 V; CL = 50 pF; TA = -40 to +85°C 5
Qn to Qn+1 Propagation Delay 0 4.5 ns VCC = 5.0 V; CL = 50 pF; TA = -40 to +85°C 5
MR to Q Propagation Delay tHL 3 15 ns VCC = 3.3 V; CL = 50 pF; TA = -40 to +85°C 5
MR to Q Propagation Delay tHL 3 12 ns VCC = 5.0 V; CL = 50 pF; TA = -40 to +85°C 5
nCP to MR Recovery Time trec 0 -2.5 ns VCC = 3.3 V; typ at TA = 25°C 5
nCP to MR Recovery Time trec 0 -1.5 ns VCC = 5.0 V; typ at TA = 25°C 5
Minimum Pulse Width, Clock Pin tw nCP 4.5 3.5 ns VCC = 3.3 V; min at TA = -40 to +85°C, typ at 25°C 5
Minimum Pulse Width, Clock Pin tw nCP 3.5 2.5 ns VCC = 5.0 V; min at TA = -40 to +85°C, typ at 25°C 5
Minimum Pulse Width, Master Reset tw MR 4.5 3.5 ns VCC = 3.3 V; min at TA = -40 to +85°C, typ at 25°C 5
Minimum Pulse Width, Master Reset tw MR 3.5 2.5 ns VCC = 5.0 V; min at TA = -40 to +85°C, typ at 25°C 5
Thermal Resistance, Junction-to-Ambient JA 69.1 °C/W Note 2 (JESD51-7) 3
Power Dissipation in Still Air at 65°C PD 500 mW Still air at 65°C (Note 3); derate to 300 mW from 65°C to 85°C 3
Input Capacitance CIN 4.5 pF VCC = 5.0 V 5
Power Dissipation Capacitance CPD 50 pF VCC = 5.0 V 5

CAD (KiCad official)

  • Symbol: MC74AC4040DR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mc74ac4040dr2g-etched.step / mc74ac4040dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74ac4040dr2g.step / mc74ac4040dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 cc16d5e989314d53, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF