component
MC74AC138DR2G
Public Made by Adomby adom
onsemi Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74AC138DR2G
onsemi · Signal Switches, Multiplexers, Decoders · SOIC-16
MC74AC138DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Binary address input (weight 1) that selects which one of the eight outputs goes LOW when the device is enabled. |
| 2 | A1 | input | Binary address input (weight 2) that selects which one of the eight outputs goes LOW when the device is enabled. |
| 3 | A2 | input | Binary address input (weight 4) that selects which one of the eight outputs goes LOW when the device is enabled. |
| 4 | E1 | input | Active-LOW enable input; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 5 | E2 | input | Active-LOW enable input; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 6 | E3 | input | Active-HIGH enable input; all outputs stay HIGH unless E3 is HIGH and E1 and E2 are LOW. |
| 7 | O7 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 8 | GND | power_in | Ground reference; all input and output voltages are specified referenced to GND (VIN and VOUT 0 V to VCC). |
| 9 | O6 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 10 | O5 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 11 | O4 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 12 | O3 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 13 | O2 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 14 | O1 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 15 | O0 | output | Active-LOW mutually exclusive decoder output that sources/sinks 24 mA. |
| 16 | VCC | power_in | Positive supply: 2.0 to 6.0 V for 74AC devices and 4.5 to 5.5 V for 74ACT devices per the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum High Level Input Voltage (VCC = 3.0 V) | VIH | 2.1 | 1.5 | V | VCC = 3.0 V; VOUT = 0.1 V or VCC − 0.1 V; TA −40 to +85°C | 5 | |
| Minimum High Level Input Voltage (VCC = 4.5 V) | VIH | 3.15 | 2.25 | V | VCC = 4.5 V; VOUT = 0.1 V or VCC − 0.1 V; TA −40 to +85°C | 5 | |
| Minimum High Level Input Voltage (VCC = 5.5 V) | VIH | 3.85 | 2.75 | V | VCC = 5.5 V; VOUT = 0.1 V or VCC − 0.1 V; TA −40 to +85°C | 5 | |
| Maximum Low Level Input Voltage (VCC = 3.0 V) | VIL | 1.5 | 0.9 | V | VCC = 3.0 V; VOUT = 0.1 V or VCC − 0.1 V; TA −40 to +85°C | 5 | |
| Maximum Low Level Input Voltage (VCC = 4.5 V) | VIL | 2.25 | 1.35 | V | VCC = 4.5 V; VOUT = 0.1 V or VCC − 0.1 V; TA −40 to +85°C | 5 | |
| Maximum Low Level Input Voltage (VCC = 5.5 V) | VIL | 2.75 | 1.65 | V | VCC = 5.5 V; VOUT = 0.1 V or VCC − 0.1 V; TA −40 to +85°C | 5 | |
| Minimum High Level Output Voltage (VCC = 3.0 V) | VOH | 2.9 | 2.99 | V | VCC = 3.0 V; IOUT = −50 μA; TA −40 to +85°C | 5 | |
| Minimum High Level Output Voltage (VCC = 4.5 V) | VOH | 4.4 | 4.49 | V | VCC = 4.5 V; IOUT = −50 μA; TA −40 to +85°C | 5 | |
| Minimum High Level Output Voltage (VCC = 5.5 V) | VOH | 5.4 | 5.49 | V | VCC = 5.5 V; IOUT = −50 μA; TA −40 to +85°C | 5 | |
| Minimum High Level Output Voltage (VCC = 3.0 V, IOH −12 mA) | VOH | 2.46 | V | VCC = 3.0 V; VIN = VIL or VIH; IOH −12 mA; TA −40 to +85°C | 5 | ||
| Minimum High Level Output Voltage (VCC = 4.5 V, IOH −24 mA) | VOH | 3.76 | V | VCC = 4.5 V; VIN = VIL or VIH; IOH −24 mA; TA −40 to +85°C | 5 | ||
| Minimum High Level Output Voltage (VCC = 5.5 V, IOH −24 mA) | VOH | 4.76 | V | VCC = 5.5 V; VIN = VIL or VIH; IOH −24 mA; TA −40 to +85°C | 5 | ||
| Maximum Low Level Output Voltage (VCC = 3.0 V) | VOL | 0.002 | 0.1 | V | VCC = 3.0 V; IOUT = 50 μA; TA −40 to +85°C | 5 | |
| Maximum Low Level Output Voltage (VCC = 4.5 V) | VOL | 0.001 | 0.1 | V | VCC = 4.5 V; IOUT = 50 μA; TA −40 to +85°C | 5 | |
| Maximum Low Level Output Voltage (VCC = 5.5 V) | VOL | 0.001 | 0.1 | V | VCC = 5.5 V; IOUT = 50 μA; TA −40 to +85°C | 5 | |
| Maximum Low Level Output Voltage (VCC = 3.0 V, IOL 12 mA) | VOL | 0.44 | V | VCC = 3.0 V; VIN = VIL or VIH; IOL 12 mA; TA −40 to +85°C | 5 | ||
| Maximum Low Level Output Voltage (VCC = 4.5 V, IOL 24 mA) | VOL | 0.44 | V | VCC = 4.5 V; VIN = VIL or VIH; IOL 24 mA; TA −40 to +85°C | 5 | ||
| Maximum Low Level Output Voltage (VCC = 5.5 V, IOL 24 mA) | VOL | 0.44 | V | VCC = 5.5 V; VIN = VIL or VIH; IOL 24 mA; TA −40 to +85°C | 5 | ||
| Maximum Input Leakage Current | IIN | -1 | 1 | μA | VCC = 5.5 V; VI = VCC, GND; TA −40 to +85°C | 5 | |
| Minimum Dynamic Output Current (LOW) | IOLD | 75 | mA | VCC = 5.5 V; VOLD = 1.65 V Max | 5 | ||
| Minimum Dynamic Output Current (HIGH) | IOHD | -75 | mA | VCC = 5.5 V; VOHD = 3.85 V Min | 5 | ||
| Maximum Quiescent Supply Current | ICC | 80 | μA | VCC = 5.5 V; VIN = VCC or GND; TA −40 to +85°C | 5 | ||
| Propagation Delay An to On tPLH (VCC 3.3 V) | tPLH | 1.5 | 8.5 | 15 | ns | VCC = 3.3 V ±0.3 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay An to On tPLH (VCC 5.0 V) | tPLH | 1.5 | 6.5 | 10.5 | ns | VCC = 5.0 V ±0.5 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay An to On tPHL (VCC 3.3 V) | tPHL | 1.5 | 8 | 14 | ns | VCC = 3.3 V ±0.3 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay An to On tPHL (VCC 5.0 V) | tPHL | 1.5 | 6 | 10.5 | ns | VCC = 5.0 V ±0.5 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E1 or E2 to On tPLH (VCC 3.3 V) | tPLH | 1.5 | 11 | 16 | ns | VCC = 3.3 V ±0.3 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E1 or E2 to On tPLH (VCC 5.0 V) | tPLH | 1.5 | 8 | 12 | ns | VCC = 5.0 V ±0.5 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E1 or E2 to On tPHL (VCC 3.3 V) | tPHL | 1.5 | 9.5 | 15 | ns | VCC = 3.3 V ±0.3 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E1 or E2 to On tPHL (VCC 5.0 V) | tPHL | 1.5 | 7 | 10.5 | ns | VCC = 5.0 V ±0.5 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E3 to On tPLH (VCC 3.3 V) | tPLH | 1.5 | 11 | 16.5 | ns | VCC = 3.3 V ±0.3 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E3 to On tPLH (VCC 5.0 V) | tPLH | 1.5 | 8 | 12.5 | ns | VCC = 5.0 V ±0.5 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E3 to On tPHL (VCC 3.3 V) | tPHL | 1.5 | 8.5 | 14 | ns | VCC = 3.3 V ±0.3 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Propagation Delay E3 to On tPHL (VCC 5.0 V) | tPHL | 1 | 6 | 9.5 | ns | VCC = 5.0 V ±0.5 V; CL = 50 pF; TA −40 to +85°C; Fig. 3-6 | 5 |
| Supply Voltage ′AC | VCC | 2 | 5 | 6 | V | ′AC devices | 4 |
| DC Input Voltage, Output Voltage (Ref. to GND) | VIN, VOUT | 0 | V | Ref. to GND; max = VCC | 4 | ||
| Junction Temperature (PDIP) | TJ | 140 | °C | Labelled PDIP in datasheet | 4 | ||
| Operating Ambient Temperature Range | TA | -40 | 25 | 85 | °C | 4 | |
| Output Current − High | IOH | -24 | mA | 4 | |||
| Output Current − Low | IOL | 24 | mA | 4 | |||
| DC Supply Voltage | VCC | -0.5 | 7 | V | 4 | ||
| DC Input Voltage | VI | -0.5 | V | −0.5 ≤ VI ≤ VCC + 0.5 V | 4 | ||
| DC Output Voltage | VO | -0.5 | V | −0.5 ≤ VO ≤ VCC + 0.5 V; see Note 1 | 4 | ||
| DC Input Diode Current | IIK | 20 | mA | 4 | |||
| DC Output Diode Current | IOK | 50 | mA | 4 | |||
| DC Output Sink/Source Current | IO | 50 | mA | 4 | |||
| DC Supply Current per Output Pin | ICC | 50 | mA | 4 | |||
| DC Ground Current per Output Pin | IGND | 50 | mA | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 4 | ||
| Junction Temperature under Bias | TJ | 150 | °C | 4 | |||
| Power Dissipation in Still Air at 65°C (SOIC) | PD | 500 | mW | SOIC; still air at 65°C | 4 | ||
| ESD Withstand Voltage Human Body Model | VESD | 2000 | V | HBM; printed as > 2000 | 4 | ||
| ESD Withstand Voltage Machine Model | VESD | 200 | V | MM; printed as > 200 | 4 | ||
| ESD Withstand Voltage Charged Device Model | VESD | 1000 | V | CDM; printed as > 1000 | 4 | ||
| Latch-Up Performance | ILatch-Up | 100 | mA | Above VCC and below GND at 85°C | 4 | ||
| Thermal Resistance Junction-to-Ambient (SOIC) | θJA | 69.1 | °C/W | SOIC; JESD51-7 | 4 | ||
| Input Rise and Fall Time ′AC, VCC @ 3.0 V | tr, tf | 150 | ns/V | ′AC except Schmitt inputs; VIN 30% to 70% VCC | 4 | ||
| Input Rise and Fall Time ′AC, VCC @ 4.5 V | tr, tf | 40 | ns/V | ′AC except Schmitt inputs; VIN 30% to 70% VCC | 4 | ||
| Input Rise and Fall Time ′AC, VCC @ 5.5 V | tr, tf | 25 | ns/V | ′AC except Schmitt inputs; VIN 30% to 70% VCC | 4 |
CAD (KiCad official)
- Symbol:
MC74AC138DR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
mc74ac138dr2g-etched.step/mc74ac138dr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74ac138dr2g.step/mc74ac138dr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (10 pp, sha256
de2cc4f08db01415, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).