component
MC74AC05DG
Public Made by Adomby adom
onsemi Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2h ago |
| viewers | 2h ago |
| mc74ac05dg-etched.glb | 2h ago |
| mc74ac05dg-etched.step | 2h ago |
| mc74ac05dg-hero.glb | 2h ago |
| mc74ac05dg-hero.overlay.json | 2h ago |
| mc74ac05dg.glb | 2h ago |
| mc74ac05dg.kicad_mod | 2h ago |
| mc74ac05dg.kicad_sym | 2h ago |
| mc74ac05dg.lbr | 2h ago |
| mc74ac05dg.step | 2h ago |
| package.json | 2h ago |
| page.json | 2h ago |
| README.md | 2h ago |
MC74AC05DG
onsemi · Inverters · SOIC-14
MC74AC05DG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Inverter 1 input, CMOS-compatible (ACT05 has TTL-compatible inputs). |
| 2 | Y1 | output | Inverter 1 open-drain output (inverts A1, high-impedance when A1 is low), sinks 24 mA. |
| 3 | A2 | input | Inverter 2 input, CMOS-compatible (ACT05 has TTL-compatible inputs). |
| 4 | Y2 | output | Inverter 2 open-drain output (inverts A2, high-impedance when A2 is low), sinks 24 mA. |
| 5 | A3 | input | Inverter 3 input, CMOS-compatible (ACT05 has TTL-compatible inputs). |
| 6 | Y3 | output | Inverter 3 open-drain output (inverts A3, high-impedance when A3 is low), sinks 24 mA. |
| 7 | GND | power_in | Ground pin (PIN 7 = GND). |
| 8 | Y4 | output | Inverter 4 open-drain output (inverts A4, high-impedance when A4 is low), sinks 24 mA. |
| 9 | A4 | input | Inverter 4 input, CMOS-compatible (ACT05 has TTL-compatible inputs). |
| 10 | Y5 | output | Inverter 5 open-drain output (inverts A5, high-impedance when A5 is low), sinks 24 mA. |
| 11 | A5 | input | Inverter 5 input, CMOS-compatible (ACT05 has TTL-compatible inputs). |
| 12 | Y6 | output | Inverter 6 open-drain output (inverts A6, high-impedance when A6 is low), sinks 24 mA. |
| 13 | A6 | input | Inverter 6 input, CMOS-compatible (ACT05 has TTL-compatible inputs). |
| 14 | VCC | power_in | Supply voltage (PIN 14 = VCC); AC operates 2.0 V to 6.0 V, absolute maximum -0.5 to +6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (abs max) | VCC | -0.5 | 6.5 | V | 2 | ||
| DC Input Voltage | VI | -0.5 | 6.5 | V | -0.5 ≤ VI ≤ VCC + 0.5 | 2 | |
| DC Output Voltage | VO | -0.5 | 6.5 | V | -0.5 ≤ VO ≤ VCC + 0.5 | 2 | |
| DC Input Diode Current | IIK | -20 | 20 | mA | 2 | ||
| DC Output Diode Current | IOK | -50 | 50 | mA | 2 | ||
| DC Output Sink/Source Current | IO | -50 | 50 | mA | 2 | ||
| DC Supply Current per Output Pin | ICC | 50 | mA | 2 | |||
| DC Ground Current per Output Pin | IGND | 50 | mA | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 2 | ||
| Junction temperature under bias | TJ | 150 | °C | 2 | |||
| Thermal Resistance | θJA | 116 | °C/W | SOIC-14 NB, JESD51-7 | 2 | ||
| Power Dissipation in Still Air | PD | 1077 | mW | SOIC-14 NB, at 25 °C | 2 | ||
| ESD Withstand Voltage HBM | VESD | 2000 | V | Human Body Model (> 2000) | 2 | ||
| ESD Withstand Voltage CDM | VESD | 1000 | V | Charged Device Model (> 1000) | 2 | ||
| Latch-Up Performance | ILatch-Up | 100 | mA | Above VCC and below GND at 85 °C | 2 | ||
| Supply Voltage (AC) | VCC | 2 | 5 | 6 | V | AC | 2 |
| DC Regulated Power Voltage | VREG | 0 | V | Ref. to GND, 0 to VCC | 2 | ||
| Input Rise and Fall Time | tr, tf | 150 | ns/V | AC devices except Schmitt inputs, VCC @ 3.0 V | 2 | ||
| Input Rise and Fall Time | tr, tf | 40 | ns/V | AC devices except Schmitt inputs, VCC @ 4.5 V | 2 | ||
| Input Rise and Fall Time | tr, tf | 25 | ns/V | AC devices except Schmitt inputs, VCC @ 5.5 V | 2 | ||
| Operating Ambient Temperature Range | TA | -40 | 25 | 85 | °C | 2 | |
| Output Current-HIGH | IOH | -24 | mA | 2 | |||
| Output Current-LOW | IOL | 24 | mA | 2 | |||
| Minimum High Level Input Voltage | VIH | 2.1 | 1.5 | V | VCC = 3.0 V, VOUT = 0.1 V or VCC − 0.1 V | 3 | |
| Minimum High Level Input Voltage | VIH | 3.15 | 2.25 | V | VCC = 4.5 V, VOUT = 0.1 V or VCC − 0.1 V | 3 | |
| Minimum High Level Input Voltage | VIH | 3.85 | 2.75 | V | VCC = 5.5 V, VOUT = 0.1 V or VCC − 0.1 V | 3 | |
| Maximum Low Level Input Voltage | VIL | 1.5 | 0.9 | V | VCC = 3.0 V, VOUT = 0.1 V or VCC − 0.1 V | 3 | |
| Maximum Low Level Input Voltage | VIL | 2.25 | 1.35 | V | VCC = 4.5 V, VOUT = 0.1 V or VCC − 0.1 V | 3 | |
| Maximum Low Level Input Voltage | VIL | 2.75 | 1.65 | V | VCC = 5.5 V, VOUT = 0.1 V or VCC − 0.1 V | 3 | |
| Maximum Low Level Output Voltage | VOL | 0.002 | 0.1 | V | VCC = 3.0 V, IOUT = 50 µA | 3 | |
| Maximum Low Level Output Voltage | VOL | 0.001 | 0.1 | V | VCC = 4.5 V, IOUT = 50 µA | 3 | |
| Maximum Low Level Output Voltage | VOL | 0.44 | V | VCC = 3.0 V, IOL = 12 mA, VIN = VIL or VIH, TA = −40 °C to +85 °C | 3 | ||
| Maximum Input Leakage Current | IIN | 1 | µA | VCC = 5.5 V, VI = VCC, GND, TA = −40 °C to +85 °C | 3 | ||
| Minimum Dynamic Output Current | IOLD | 75 | mA | VCC = 5.5 V, VOLD = 1.65 V Max | 3 | ||
| Minimum Dynamic Output Current | IOHD | -75 | mA | VCC = 5.5 V, VOHD = 3.85 V Min | 3 | ||
| Maximum Quiescent Supply Current | ICC | 40 | µA | VCC = 5.5 V, VIN = VCC or GND, TA = −40 °C to +85 °C | 3 | ||
| Propagation Delay Output Enable | tPZL | 1 | 9 | ns | VCC = 3.3 V, CL = 50 pF, TA = −40 °C to +85 °C | 3 | |
| Propagation Delay Output Enable | tPZL | 1 | 6.5 | ns | VCC = 5.0 V, CL = 50 pF, TA = −40 °C to +85 °C | 3 | |
| Input Capacitance | CIN | 4.5 | pF | VCC = 5.0 V | 4 | ||
| Power Dissipation Capacitance | CPD | 30 | pF | VCC = 5.0 V | 4 |
CAD (KiCad official)
- Symbol:
MC74AC05DG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc74ac05dg-etched.step/mc74ac05dg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74ac05dg.step/mc74ac05dg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
f74c9bca695e5d3c, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).