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MC74AC02DR2G

Public Made by Adom

by adom

onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC74AC02DR2G

onsemi · Gates · SOIC-14

MC74AC02DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y output Gate 1 NOR output, sources/sinks 24 mA.
2 1A input Gate 1 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
3 1B input Gate 1 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
4 2Y output Gate 2 NOR output, sources/sinks 24 mA.
5 2A input Gate 2 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
6 2B input Gate 2 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
7 GND power_in Ground (0 V reference).
8 3A input Gate 3 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
9 3B input Gate 3 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
10 3Y output Gate 3 NOR output, sources/sinks 24 mA.
11 4A input Gate 4 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
12 4B input Gate 4 input; 'AC02 CMOS levels, 'ACT02 TTL-compatible levels.
13 4Y output Gate 4 NOR output, sources/sinks 24 mA.
14 VCC power_in Supply voltage; 2.0 to 6.0 V for 'AC, 4.5 to 5.5 V for 'ACT (abs max -0.5 to +6.5 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC -0.5 6.5 V 2
DC Input Voltage VI -0.5 6.5 V -0.5 ≤ VI ≤ VCC + 0.5 V; max shown assumes VCC = 6.0 V recommended maximum is not stated, so see note 2
DC Input Diode Current IIK -20 20 mA ±20 mA 2
DC Output Diode Current IOK -50 50 mA ±50 mA 2
DC Output Sink/Source Current IO -50 50 mA ±50 mA 2
DC Supply Current per Output Pin ICC -50 50 mA ±50 mA 2
DC Ground Current per Output Pin IGND -50 50 mA ±50 mA 2
Storage Temperature Range TSTG -65 150 °C 2
Lead temperature TL 260 °C 1 mm from case for 10 seconds 2
Junction temperature under bias TJ 150 °C 2
Thermal Resistance θJA 116 °C/W SOIC-14 NB, JESD51-7 2
Power Dissipation in Still Air PD 1077 mW SOIC-14 NB, 25 °C 2
ESD Withstand Voltage HBM VESD 2000 V Human Body Model, > 2000 2
ESD Withstand Voltage CDM VESD 1000 V Charged Device Model, > 1000 2
Latch-Up Performance ILatch-Up -100 100 mA Above VCC and below GND at 85 °C 2
Supply Voltage 'AC VCC 2 5 6 V 'AC 2
DC Input/Output Voltage Vin, Vout 0 6 V Ref. to GND; 0 to VCC 2
Operating Ambient Temperature TA -40 25 85 °C 2
Output Current High IOH -24 mA 2
Output Current Low IOL 24 mA 2
Input Rise and Fall Time 'AC tr, tf 150 ns/V VCC @ 3.0 V, Vin 30% to 70% VCC 2
Input Rise and Fall Time 'AC tr, tf 40 ns/V VCC @ 4.5 V, Vin 30% to 70% VCC 2
Input Rise and Fall Time 'AC tr, tf 25 ns/V VCC @ 5.5 V, Vin 30% to 70% VCC 2
Minimum High Level Input Voltage VIH 2.1 1.5 V VCC = 3.0 V, VOUT = 0.1 V or VCC − 0.1 V 3
Minimum High Level Input Voltage VIH 3.15 2.25 V VCC = 4.5 V, VOUT = 0.1 V or VCC − 0.1 V 3
Minimum High Level Input Voltage VIH 3.85 2.75 V VCC = 5.5 V, VOUT = 0.1 V or VCC − 0.1 V 3
Maximum Low Level Input Voltage VIL 1.5 0.9 V VCC = 3.0 V, VOUT = 0.1 V or VCC − 0.1 V 3
Maximum Low Level Input Voltage VIL 2.25 1.35 V VCC = 4.5 V, VOUT = 0.1 V or VCC − 0.1 V 3
Maximum Low Level Input Voltage VIL 2.75 1.65 V VCC = 5.5 V, VOUT = 0.1 V or VCC − 0.1 V 3
Minimum High Level Output Voltage VOH 2.9 2.99 V VCC = 3.0 V, IOUT = −50 µA 3
Minimum High Level Output Voltage VOH 4.4 4.49 V VCC = 4.5 V, IOUT = −50 µA 3
Minimum High Level Output Voltage VOH 5.4 5.49 V VCC = 5.5 V, IOUT = −50 µA 3
Minimum High Level Output Voltage VOH 2.46 2.56 V VCC = 3.0 V, VIN = VIL or VIH, IOH = −12 mA 3
Minimum High Level Output Voltage VOH 3.76 3.86 V VCC = 4.5 V, VIN = VIL or VIH, IOH = −24 mA 3
Minimum High Level Output Voltage VOH 4.76 4.86 V VCC = 5.5 V, VIN = VIL or VIH, IOH = −24 mA 3
Maximum Low Level Output Voltage VOL 0.002 0.1 V VCC = 3.0 V, IOUT = 50 µA 3
Maximum Low Level Output Voltage VOL 0.001 0.1 V VCC = 4.5 V, IOUT = 50 µA 3
Maximum Low Level Output Voltage VOL 0.36 0.44 V VCC = 3.0 V, VIN = VIL or VIH, IOL = 12 mA 3
Maximum Input Leakage Current IIN -1 1 µA VCC = 5.5 V, VI = VCC, GND, TA = −40 to +85 °C (±0.1 at 25 °C) 3
Minimum Dynamic Output Current IOLD 75 mA VCC = 5.5 V, VOLD = 1.65 V Max 3
Minimum Dynamic Output Current IOHD -75 mA VCC = 5.5 V, VOHD = 3.85 V Min 3
Maximum Quiescent Supply Current ICC 40 µA VCC = 5.5 V, VIN = VCC or GND, TA = −40 to +85 °C (4.0 at 25 °C) 3
Propagation Delay tPLH tPLH 1 5 8 ns VCC = 3.3 V, CL = 50 pF, TA = −40 to +85 °C (25 °C: 1.5/5.0/7.5) 3
Propagation Delay tPLH tPLH 1 4 6.5 ns VCC = 5.0 V, CL = 50 pF, TA = −40 to +85 °C (25 °C: 1.5/4.0/6.0) 3
Propagation Delay tPHL tPHL 1 5 8 ns VCC = 3.3 V, CL = 50 pF, TA = −40 to +85 °C (25 °C: 1.5/5.0/7.5) 3
Propagation Delay tPHL tPHL 1 4.5 7 ns VCC = 5.0 V, CL = 50 pF, TA = −40 to +85 °C (25 °C: 1.5/4.5/6.5) 3
Input Capacitance CIN 4.5 pF VCC = 5.0 V 4
Power Dissipation Capacitance CPD 30 pF VCC = 5.0 V 4

CAD (KiCad official)

  • Symbol: MC74AC02DR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc74ac02dr2g-etched.step / mc74ac02dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74ac02dr2g.step / mc74ac02dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 58c18d45011c895d, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF