component
MC33664ATL1EGR2
Public Made by Adomby adom
NXP Semicon Interface - Specialized, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| mc33664atl1egr2-etched.step | 18d ago |
| mc33664atl1egr2-hero.glb | 18d ago |
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MC33664ATL1EGR2
NXP Semicon · Interface - Specialized · SO-16
MC33664ATL1EGR2 from NXP Semicon, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCLK_TX | input | SPI transmit clock from the microcontroller to the MC33664, up to 2.0 MHz, with logic levels referenced to VIO (max VIO + 0.3 V). |
| 2 | CSB_TX | input | SPI transmit chip select from the microcontroller to the MC33664, with an internal 100 kΩ pull-up. |
| 3 | DATA_TX | input | SPI transmit data from the microcontroller to the MC33664, with an internal 100 kΩ pull-down. |
| 4 | EN | input | Enable control pin for the MCU to put the MC33664 into Sleep mode (EN = 0) or Normal mode (EN = 1), with an internal 100 kΩ pull-down. |
| 5 | SCLK_RX | output | Message receive SPI clock output to the microcontroller, up to 2.0 MHz. |
| 6 | CSB_RX | output | Message receive SPI chip select output to the microcontroller. |
| 7 | DATA_RX | output | Message receive SPI data output to the microcontroller. |
| 8 | INTB | output | Digital interrupt pin used to trigger MCU wake-ups, giving a 100 µs verification pulse after EN goes from LOW to HIGH. |
| 9 | VIO | power_in | Digital 3.3 V/5.0 V power supply to the IC, with a normal operating range of 3.1 V to 5.5 V and an absolute maximum of 7.0 V. |
| 10 | DGND | power_in | Digital ground, the reference for the VIO and logic pins. |
| 11 | GNDT | power_in | Terminate to ground. |
| 12 | GNDS | power_in | Substrate ground; terminate to ground. |
| 13 | RDTX- | bidirectional | Transformer communication bi-directional bus pin, with a ±10 V absolute maximum rating. |
| 14 | RDTX+ | bidirectional | Transformer communication bi-directional bus pin, with a ±10 V absolute maximum rating. |
| 15 | AGND | power_in | Analog ground, the reference for the VCC5 supply and bus pins. |
| 16 | VCC5 | power_in | 5.0 V input supply, with a fully operational range of 4.75 V to 5.5 V and an absolute maximum of 7.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NXP Semicon |
| Package | SO-16 |
| Category | Interface ICs |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
MC33664ATL1EGR2 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
mc33664atl1egr2-etched.step/mc33664atl1egr2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc33664atl1egr2.step/mc33664atl1egr2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NXP Semicon datasheet (15 pp, sha256
17eb8c4ae973c5ec, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).