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docs mc33272adr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
mc33272adr2g-etched.fit.json mc33272adr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
mc33272adr2g-etched.glb mc33272adr2g: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
mc33272adr2g-etched.step mc33272adr2g: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
mc33272adr2g.glb Publish 0.1.0 · Ray
mc33272adr2g.kicad_mod Publish 0.1.0 · Ray
mc33272adr2g.kicad_sym Publish 0.1.0 · Ray
mc33272adr2g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
mc33272adr2g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json mc33272adr2g: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
README.md mc33272adr2g: specified limits as data (metadata.characteristics, 37 rows from the datasheet) · Ray

MC33272ADR2G

onsemi · Operational Amplifier · SOP-8

MC33272ADR2G from onsemi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of amplifier 1. NPN output stage with symmetrical source/sink capability (±37 mA typ short-circuit current); swings within ~1 V of VCC and VEE rails.
2 IN1- input Inverting input of amplifier 1. Bipolar input with ~300 nA typical input bias current and 16 MΩ differential input resistance.
3 IN1+ input Non-inverting input of amplifier 1. Common-mode range from VEE to (VCC - 1.8 V); do not exceed VCC or VEE on either input.
4 VEE power_in Negative supply / ground. Total supply (VCC - VEE) rated up to +36 V. In single-supply operation, tie to ground.
5 IN2+ input Non-inverting input of amplifier 2. Common-mode range from VEE to (VCC - 1.8 V); do not exceed VCC or VEE on either input.
6 IN2- input Inverting input of amplifier 2. Bipolar input with ~300 nA typical input bias current and 16 MΩ differential input resistance.
7 OUT2 output Output of amplifier 2. NPN output stage with symmetrical source/sink capability (±37 mA typ short-circuit current); unity-gain stable with capacitive loads up to 500 pF.
8 VCC power_in Positive supply. +3.0 V to +36 V single-supply, or ±1.5 V to ±18 V split-supply. Quiescent current ~2.15 mA per amplifier.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • MC33272ADR2GD
  • MC33272ADR2G
  • MC33272ADR2GP
  • MC33272ADR2GAPG
  • MC33272ADR2GDG
  • MC33272ADR2GDTB
  • MC33272ADR2GDTBG

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage (VCC=+15 V, VEE=-15 V, TA=+25°C) /VIO/ 0.1 1 mV RS = 10, VCM = 0 V, VO = 0 V, VCC = +15 V, VEE = -15 V, TA = +25°C 3
Input Offset Voltage (VCC=+15 V, VEE=-15 V, TA=-40° to +85°C) /VIO/ 1.8 mV RS = 10, VCM = 0 V, VO = 0 V, VCC = +15 V, VEE = -15 V, TA = -40° to +85°C 3
Input Offset Voltage (VCC=5.0 V, VEE=0, TA=+25°C) /VIO/ 2 mV RS = 10, VCM = 0 V, VO = 0 V, VCC = 5.0 V, VEE = 0, TA = +25°C 3
Input Bias Current (TA=+25°C) IIB 300 650 nA VCM = 0 V, VO = 0 V, TA = +25°C 3
Input Bias Current (TA=Tlow to Thigh) IIB 800 nA VCM = 0 V, VO = 0 V, TA = Tlow to Thigh (-40°C to +85°C, note 3) 3
Input Offset Current (TA=+25°C) /IIO/ 3 65 nA VCM = 0 V, VO = 0 V, TA = +25°C 3
Input Offset Current (TA=Tlow to Thigh) /IIO/ 80 nA VCM = 0 V, VO = 0 V, TA = Tlow to Thigh (-40°C to +85°C, note 3) 3
Large Signal Voltage Gain (TA=+25°C) AVOL 90 100 dB VO = 0 V to 10 V, RL = 2.0 k, TA = +25°C 3
Large Signal Voltage Gain (TA=Tlow to Thigh) AVOL 86 dB VO = 0 V to 10 V, RL = 2.0 k, TA = Tlow to Thigh (-40°C to +85°C, note 3) 3
Common Mode Rejection CMR 80 100 dB Vin = +13.2 V to -15 V 3
Power Supply Rejection PSR 80 105 dB VCC/VEE = +15 V/-15 V, +5.0 V/-15 V, +15 V/-5.0 V 3
Output Short Circuit Current, Source ISC 25 37 mA VID = 1.0 V, Output to Ground, Source 3
Output Short Circuit Current, Sink ISC -25 -37 mA VID = 1.0 V, Output to Ground, Sink 3
Power Supply Current Per Amplifier (VCC=+15 V, VEE=-15 V, TA=+25°C) ICC 2.15 2.75 mA VO = 0 V, VCC = +15 V, VEE = -15 V, TA = +25°C 3
Power Supply Current Per Amplifier (VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh) ICC 3 mA VO = 0 V, VCC = +15 V, VEE = -15 V, TA = Tlow to Thigh (-40°C to +85°C, note 3) 3
Power Supply Current Per Amplifier (VCC=5.0 V, VEE=0, TA=+25°C) ICC 2.75 mA VO = 0 V, VCC = 5.0 V, VEE = 0 V, TA = +25°C 3
Slew Rate SR 8 10 V/s Vin = -10 V to +10 V, RL = 2.0 k, CL = 100 pF, AV = +1.0 4
Gain Bandwidth Product GBW 17 24 MHz f = 100 kHz 4
AC Voltage Gain AVO 65 dB RL = 2.0 k, VO = 0 V, f = 20 kHz 4
Unity Gain Bandwidth (Open Loop) BW 5.5 MHz Open loop 4
Gain Margin Am 12 dB RL = 2.0 k, CL = 0 pF 4
Phase Margin 55 Deg RL = 2.0 k, CL = 0 pF 4
Channel Separation CS -120 dB f = 20 Hz to 20 kHz 4
Power Bandwidth BWP 160 kHz VO = 20 Vpp, RL = 2.0 k, THD ≤ 1.0% 4
Total Harmonic Distortion THD 0.003 % RL = 2.0 k, f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0 4
Open Loop Output Impedance /ZO/ 35 Ω VO = 0 V, f = 6.0 MHz 4
Differential Input Resistance Rin 16 M VCM = 0 V 4
Differential Input Capacitance Cin 3 pF VCM = 0 V 4
Equivalent Input Noise Voltage en 18 nV/√Hz RS = 100, f = 1.0 kHz 4
Equivalent Input Noise Current in 0.5 pA/√Hz f = 1.0 kHz 4
Average Temperature Coefficient of Input Offset Voltage VIO/T 2 V/°C RS = 10, VCM = 0 V, VO = 0 V, TA = -40° to +125°C 3
Supply Voltage (VCC to VEE) VCC to VEE 36 V 2
ESD Protection, Human Body Model Vesd 2000 V Human Body Model 2
ESD Protection, Machine Model Vesd 200 V Machine Model 2
Maximum Junction Temperature TJ 150 °C 2
Storage Temperature Tstg -60 150 °C 2
Operating Temperature Range (MC33272A) TA -40 85 °C MC33272A, MC33274A 2

CAD (KiCad official)

  • Symbol: MC33272ADR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: mc33272adr2g-etched.step / mc33272adr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc33272adr2g.step / mc33272adr2g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
mc33272adr2g.step 122 KB You want the bare part, or you mark your own boards.
mc33272adr2g-etched.step 2.6 MB You want the part with MC33272ADR2G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 628 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (16 pp, sha256 d10ac1a1a835b1ee, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF