component
MC33172VDR2G
Public Made by Adomby adom
onsemi Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC33172VDR2G
onsemi · Operational Amplifier · SOIC-8
MC33172VDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Output 1 | output | Output of amplifier 1, which is current limited and protected from a direct short to ground, provided the junction temperature rating is not exceeded. |
| 2 | Inputs 1 (inverting) | input | Inverting input of amplifier 1; either or both input voltages must not exceed the magnitude of VCC or VEE. |
| 3 | Inputs 1 (non-inverting) | input | Non-inverting input of amplifier 1; the common mode input range includes VEE (ground) for single-supply operation. |
| 4 | VEE | power_in | Negative supply rail; the device operates from 3.0 V to 44 V single supply or ±1.5 V to ±22 V split supplies, and supply voltage is rated to ±22 V maximum. |
| 5 | Inputs 2 (non-inverting) | input | Non-inverting input of amplifier 2; the common mode input range includes VEE (ground) for single-supply operation. |
| 6 | Inputs 2 (inverting) | input | Inverting input of amplifier 2; either or both input voltages must not exceed the magnitude of VCC or VEE. |
| 7 | Output 2 | output | Output of amplifier 2, which is current limited and protected from a direct short to ground, provided the junction temperature rating is not exceeded. |
| 8 | VCC | power_in | Positive supply rail; the device operates from 3.0 V to 44 V single supply or ±1.5 V to ±22 V split supplies, and supply voltage is rated to ±22 V maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage, VCC=+15 V, VEE=-15 V, TA=+25C | VIO | 2 | 4.5 | mV | VCC = +15 V, VEE = −15 V, TA = +25°C | 3 | |
| Input Offset Voltage, VCC=+5.0 V, VEE=0 V, TA=+25C | VIO | 2.5 | 5 | mV | VCC = +5.0 V, VEE = 0 V, TA = +25°C | 3 | |
| Input Offset Voltage, VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | VIO | 6.5 | mV | VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Input Bias Current, TA=+25C | IIB | 20 | 100 | nA | VCM = 0 V, TA = +25°C | 3 | |
| Input Bias Current, TA=Tlow to Thigh | IIB | 200 | nA | VCM = 0 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Input Offset Current, TA=+25C | IIO | 5 | 20 | nA | VCM = 0 V, TA = +25°C | 3 | |
| Input Offset Current, TA=Tlow to Thigh | IIO | 40 | nA | VCM = 0 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Large Signal Voltage Gain, TA=+25C | AVOL | 50 | 500 | V/mV | VO = ±10 V, RL = 10 k, TA = +25°C | 3 | |
| Large Signal Voltage Gain, TA=Tlow to Thigh | AVOL | 25 | V/mV | VO = ±10 V, RL = 10 k, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Output Voltage Swing VOH, VCC=+5.0 V, VEE=0 V, TA=+25C | VOH | 3.5 | 4.3 | V | VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C | 3 | |
| Output Voltage Swing VOH, VCC=+15 V, VEE=-15 V, TA=+25C | VOH | 13.6 | 14.2 | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C | 3 | |
| Output Voltage Swing VOH, VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | VOH | 13.3 | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Output Voltage Swing VOL, VCC=+5.0 V, VEE=0 V, TA=+25C | VOL | 0.05 | 0.15 | V | VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C | 3 | |
| Output Voltage Swing VOL, VCC=+15 V, VEE=-15 V, TA=+25C | VOL | -14.2 | -13.6 | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C | 3 | |
| Output Voltage Swing VOL, VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | VOL | -13.3 | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Output Short Circuit Source Current, TA=+25C | ISC | 3 | 5 | mA | Source; Input Overdrive = 1.0 V, Output to Ground, TA = +25°C | 3 | |
| Output Short Circuit Sink Current, TA=+25C | ISC | 15 | 27 | mA | Sink; Input Overdrive = 1.0 V, Output to Ground, TA = +25°C | 3 | |
| Common Mode Rejection Ratio | CMRR | 80 | 90 | dB | RS ≤ 10 k, TA = +25°C | 3 | |
| Power Supply Rejection Ratio | PSRR | 80 | 100 | dB | RS = 100, TA = +25°C | 3 | |
| Power Supply Current (Per Amplifier), VCC=+5.0 V, VEE=0 V, TA=+25C | ID | 180 | 250 | µA | VCC = +5.0 V, VEE = 0 V, TA = +25°C | 3 | |
| Power Supply Current (Per Amplifier), VCC=+15 V, VEE=-15 V, TA=+25C | ID | 220 | 250 | µA | VCC = +15 V, VEE = −15 V, TA = +25°C | 3 | |
| Power Supply Current (Per Amplifier), VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | ID | 300 | µA | VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 | ||
| Slew Rate, AV=+1 | SR | 1.6 | 2.1 | V/µs | AV = +1; Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF | 4 | |
| Gain Bandwidth Product | GBW | 1.4 | 1.8 | MHz | f = 100 kHz | 4 | |
| Supply Voltage Operating Range (Features) | VCC/VEE | 3 | 44 | V | Single supply 3.0 V to 44 V; split ±1.5 V to ±22 V also listed (Features) | 1 | |
| Supply Voltage (±22 V) | VCC/VEE | -22 | 22 | V | 3 | ||
| Operating Junction Temperature | TJ | 150 | °C | 3 | |||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 3 | ||
| Average Temperature Coefficient of Offset Voltage | VIO/T | 10 | V/°C | 3 | |||
| Slew Rate, AV=-1 | SR | 2.1 | V/µs | AV = −1; Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF | 4 | ||
| Power Bandwidth | BWp | 35 | kHz | AV = +1.0, RL = 10 k, VO = 20 Vpp, THD = 5% | 4 | ||
| Phase Margin, RL=10 k | m | 60 | Deg | RL = 10 k | 4 | ||
| Phase Margin, RL=10 k, CL=100 pF | m | 45 | Deg | RL = 10 k, CL = 100 pF | 4 | ||
| Gain Margin, RL=10 k | Am | 15 | dB | RL = 10 k | 4 | ||
| Gain Margin, RL=10 k, CL=100 pF | Am | 5 | dB | RL = 10 k, CL = 100 pF | 4 | ||
| Equivalent Input Noise Voltage | en | 32 | nV/√Hz | RS = 100, f = 1.0 kHz | 4 | ||
| Equivalent Input Noise Current | In | 0.2 | pA/√Hz | f = 1.0 kHz | 4 | ||
| Differential Input Resistance | Rin | 300 | MΩ | Vcm = 0 V | 4 | ||
| Input Capacitance | Cin | 0.8 | pF | 4 | |||
| Total Harmonic Distortion | THD | 0.03 | % | AV = +10, RL = 10 k, 2.0 Vpp ≤ VO ≤ 20 Vpp, f = 10 kHz | 4 | ||
| Channel Separation | CS | 120 | dB | f = 10 kHz | 4 | ||
| Open Loop Output Impedance | zo | 100 | Ω | f = 1.0 MHz | 4 |
CAD (KiCad official)
- Symbol:
MC33172VDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mc33172vdr2g-etched.step/mc33172vdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc33172vdr2g.step/mc33172vdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (15 pp, sha256
f1e9ff0b61491b0b, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC33172VDR2G
**onsemi** · Operational Amplifier · SOIC-8
MC33172VDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Output 1 | output | Output of amplifier 1, which is current limited and protected from a direct short to ground, provided the junction temperature rating is not exceeded. |
| 2 | Inputs 1 (inverting) | input | Inverting input of amplifier 1; either or both input voltages must not exceed the magnitude of VCC or VEE. |
| 3 | Inputs 1 (non-inverting) | input | Non-inverting input of amplifier 1; the common mode input range includes VEE (ground) for single-supply operation. |
| 4 | VEE | power_in | Negative supply rail; the device operates from 3.0 V to 44 V single supply or ±1.5 V to ±22 V split supplies, and supply voltage is rated to ±22 V maximum. |
| 5 | Inputs 2 (non-inverting) | input | Non-inverting input of amplifier 2; the common mode input range includes VEE (ground) for single-supply operation. |
| 6 | Inputs 2 (inverting) | input | Inverting input of amplifier 2; either or both input voltages must not exceed the magnitude of VCC or VEE. |
| 7 | Output 2 | output | Output of amplifier 2, which is current limited and protected from a direct short to ground, provided the junction temperature rating is not exceeded. |
| 8 | VCC | power_in | Positive supply rail; the device operates from 3.0 V to 44 V single supply or ±1.5 V to ±22 V split supplies, and supply voltage is rated to ±22 V maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage, VCC=+15 V, VEE=-15 V, TA=+25C | VIO | | 2 | 4.5 | mV | VCC = +15 V, VEE = −15 V, TA = +25°C | 3 |
| Input Offset Voltage, VCC=+5.0 V, VEE=0 V, TA=+25C | VIO | | 2.5 | 5 | mV | VCC = +5.0 V, VEE = 0 V, TA = +25°C | 3 |
| Input Offset Voltage, VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | VIO | | | 6.5 | mV | VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Input Bias Current, TA=+25C | IIB | | 20 | 100 | nA | VCM = 0 V, TA = +25°C | 3 |
| Input Bias Current, TA=Tlow to Thigh | IIB | | | 200 | nA | VCM = 0 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Input Offset Current, TA=+25C | IIO | | 5 | 20 | nA | VCM = 0 V, TA = +25°C | 3 |
| Input Offset Current, TA=Tlow to Thigh | IIO | | | 40 | nA | VCM = 0 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Large Signal Voltage Gain, TA=+25C | AVOL | 50 | 500 | | V/mV | VO = ±10 V, RL = 10 k, TA = +25°C | 3 |
| Large Signal Voltage Gain, TA=Tlow to Thigh | AVOL | 25 | | | V/mV | VO = ±10 V, RL = 10 k, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Output Voltage Swing VOH, VCC=+5.0 V, VEE=0 V, TA=+25C | VOH | 3.5 | 4.3 | | V | VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C | 3 |
| Output Voltage Swing VOH, VCC=+15 V, VEE=-15 V, TA=+25C | VOH | 13.6 | 14.2 | | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C | 3 |
| Output Voltage Swing VOH, VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | VOH | 13.3 | | | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Output Voltage Swing VOL, VCC=+5.0 V, VEE=0 V, TA=+25C | VOL | | 0.05 | 0.15 | V | VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C | 3 |
| Output Voltage Swing VOL, VCC=+15 V, VEE=-15 V, TA=+25C | VOL | | -14.2 | -13.6 | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C | 3 |
| Output Voltage Swing VOL, VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | VOL | | | -13.3 | V | VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Output Short Circuit Source Current, TA=+25C | ISC | 3 | 5 | | mA | Source; Input Overdrive = 1.0 V, Output to Ground, TA = +25°C | 3 |
| Output Short Circuit Sink Current, TA=+25C | ISC | 15 | 27 | | mA | Sink; Input Overdrive = 1.0 V, Output to Ground, TA = +25°C | 3 |
| Common Mode Rejection Ratio | CMRR | 80 | 90 | | dB | RS ≤ 10 k, TA = +25°C | 3 |
| Power Supply Rejection Ratio | PSRR | 80 | 100 | | dB | RS = 100, TA = +25°C | 3 |
| Power Supply Current (Per Amplifier), VCC=+5.0 V, VEE=0 V, TA=+25C | ID | | 180 | 250 | µA | VCC = +5.0 V, VEE = 0 V, TA = +25°C | 3 |
| Power Supply Current (Per Amplifier), VCC=+15 V, VEE=-15 V, TA=+25C | ID | | 220 | 250 | µA | VCC = +15 V, VEE = −15 V, TA = +25°C | 3 |
| Power Supply Current (Per Amplifier), VCC=+15 V, VEE=-15 V, TA=Tlow to Thigh | ID | | | 300 | µA | VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3; MC3317xV Tlow −40°C, Thigh +125°C) | 3 |
| Slew Rate, AV=+1 | SR | 1.6 | 2.1 | | V/µs | AV = +1; Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF | 4 |
| Gain Bandwidth Product | GBW | 1.4 | 1.8 | | MHz | f = 100 kHz | 4 |
| Supply Voltage Operating Range (Features) | VCC/VEE | 3 | | 44 | V | Single supply 3.0 V to 44 V; split ±1.5 V to ±22 V also listed (Features) | 1 |
| Supply Voltage (±22 V) | VCC/VEE | -22 | | 22 | V | | 3 |
| Operating Junction Temperature | TJ | | | 150 | °C | | 3 |
| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 3 |
| Average Temperature Coefficient of Offset Voltage | VIO/T | | 10 | | V/°C | | 3 |
| Slew Rate, AV=-1 | SR | | 2.1 | | V/µs | AV = −1; Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF | 4 |
| Power Bandwidth | BWp | | 35 | | kHz | AV = +1.0, RL = 10 k, VO = 20 Vpp, THD = 5% | 4 |
| Phase Margin, RL=10 k | m | | 60 | | Deg | RL = 10 k | 4 |
| Phase Margin, RL=10 k, CL=100 pF | m | | 45 | | Deg | RL = 10 k, CL = 100 pF | 4 |
| Gain Margin, RL=10 k | Am | | 15 | | dB | RL = 10 k | 4 |
| Gain Margin, RL=10 k, CL=100 pF | Am | | 5 | | dB | RL = 10 k, CL = 100 pF | 4 |
| Equivalent Input Noise Voltage | en | | 32 | | nV/√Hz | RS = 100, f = 1.0 kHz | 4 |
| Equivalent Input Noise Current | In | | 0.2 | | pA/√Hz | f = 1.0 kHz | 4 |
| Differential Input Resistance | Rin | | 300 | | MΩ | Vcm = 0 V | 4 |
| Input Capacitance | Cin | | 0.8 | | pF | | 4 |
| Total Harmonic Distortion | THD | | 0.03 | | % | AV = +10, RL = 10 k, 2.0 Vpp ≤ VO ≤ 20 Vpp, f = 10 kHz | 4 |
| Channel Separation | CS | | 120 | | dB | f = 10 kHz | 4 |
| Open Loop Output Impedance | zo | | 100 | | Ω | f = 1.0 MHz | 4 |
## CAD (KiCad official)
- Symbol: `MC33172VDR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mc33172vdr2g-etched.step` / `mc33172vdr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc33172vdr2g.step` / `mc33172vdr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884595358519296) (15 pp, sha256 `f1e9ff0b61491b0b`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc33172vdr2g-datasheet.pdf)