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Contents

README

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MC33171DR2G

onsemi · Operational Amplifier · SO-8

MC33171DR2G from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Offset Null passive Offset null pin for the MC33171 only; a 10 kΩ potentiometer gives an offset nulling range of approximately ±80 mV.
2 Inv. Input input Inverting input; the input common mode voltage range extends down to VEE, and input voltages must not exceed the VCC or VEE supply magnitudes (Note 1, maximum ratings).
3 Noninv. Input input Non-inverting input; the input common mode voltage range extends down to VEE, and input voltages must not exceed the VCC or VEE supply magnitudes (Note 1, maximum ratings).
4 VEE power_in Negative supply rail; the device operates from 3.0 V to 44 V single supply or ±1.5 V to ±22 V split supplies, with a maximum supply of ±22 V.
5 Offset Null passive Second offset null pin for the MC33171 only; a 10 kΩ potentiometer gives an offset nulling range of approximately ±80 mV.
6 Output output Amplifier output, current limited and protected against a direct short to ground; it can sink at least 15 mA, typically to within about VEE +1.8 V.
7 VCC power_in Positive supply rail; the device operates from 3.0 V to 44 V single supply or ±1.5 V to ±22 V split supplies, with a maximum supply of ±22 V.
8 NC unconnected No connection, as shown on the SO-8 pin diagram.

Key specifications

Parameter Value
Manufacturer onsemi
Package SO-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage, VCC=+15 V/VEE=-15 V, TA=+25°C VIO 2 4.5 mV VCC = +15 V, VEE = −15 V, TA = +25°C, VCM = 0 V 3
Input Offset Voltage, VCC=+5.0 V/VEE=0 V, TA=+25°C VIO 2.5 5 mV VCC = +5.0 V, VEE = 0 V, TA = +25°C, VCM = 0 V 3
Input Offset Voltage, VCC=+15 V/VEE=-15 V, TA=Tlow to Thigh VIO 6.5 mV VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3), VCM = 0 V 3
Input Bias Current, TA=+25°C IIB 20 100 nA VCM = 0 V, TA = +25°C 3
Input Bias Current, TA=Tlow to Thigh IIB 200 nA VCM = 0 V, TA = Tlow to Thigh (Note 3) 3
Input Offset Current, TA=+25°C IIO 5 20 nA VCM = 0 V, TA = +25°C 3
Input Offset Current, TA=Tlow to Thigh IIO 40 nA VCM = 0 V, TA = Tlow to Thigh (Note 3) 3
Large Signal Voltage Gain, TA=+25°C AVOL 50 500 V/mV VO = ±10 V, RL = 10 k, TA = +25°C 3
Large Signal Voltage Gain, TA=Tlow to Thigh AVOL 25 V/mV VO = ±10 V, RL = 10 k, TA = Tlow to Thigh (Note 3) 3
Output Voltage Swing High, VCC=+5.0 V/VEE=0 V, TA=+25°C VOH 3.5 4.3 V VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C 3
Output Voltage Swing High, VCC=+15 V/VEE=-15 V, TA=+25°C VOH 13.6 14.2 V VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C 3
Output Voltage Swing High, VCC=+15 V/VEE=-15 V, TA=Tlow to Thigh VOH 13.3 V VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3) 3
Output Voltage Swing Low, VCC=+5.0 V/VEE=0 V, TA=+25°C VOL 0.05 0.15 V VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C 3
Output Voltage Swing Low, VCC=+15 V/VEE=-15 V, TA=+25°C VOL -14.2 -13.6 V VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C 3
Output Voltage Swing Low, VCC=+15 V/VEE=-15 V, TA=Tlow to Thigh VOL -13.3 V VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3) 3
Output Short Circuit Source Current, TA=+25°C ISC 3 5 mA Input Overdrive = 1.0 V, Output to Ground, TA = +25°C 3
Output Short Circuit Sink Current, TA=+25°C ISC 15 27 mA Input Overdrive = 1.0 V, Output to Ground, TA = +25°C 3
Common Mode Rejection Ratio, TA=+25°C CMRR 80 90 dB RS ≤ 10 k, TA = +25°C 3
Power Supply Rejection Ratio, TA=+25°C PSRR 80 100 dB RS = 100, TA = +25°C 3
Power Supply Current Per Amplifier, VCC=+5.0 V/VEE=0 V, TA=+25°C ID 180 250 µA VCC = +5.0 V, VEE = 0 V, TA = +25°C 3
Power Supply Current Per Amplifier, VCC=+15 V/VEE=-15 V, TA=+25°C ID 220 250 µA VCC = +15 V, VEE = −15 V, TA = +25°C 3
Power Supply Current Per Amplifier, VCC=+15 V/VEE=-15 V, TA=Tlow to Thigh ID 300 µA VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3) 3
Slew Rate, AV = +1 SR 1.6 2.1 V/µs Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF, AV = +1 4
Slew Rate, AV = −1 SR 2.1 V/µs Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF, AV = −1 4
Gain Bandwidth Product GBW 1.4 1.8 MHz f = 100 kHz 4
Supply Voltage (VCC/VEE) VCC/VEE -22 22 V 3
Operating Junction Temperature TJ 150 °C 3
Storage Temperature Range Tstg -65 150 °C 3
Operating Ambient Temperature Range (MC33171DG/DR2G) TA -40 85 °C Per ordering table for MC33171DR2G 9

CAD (KiCad official)

  • Symbol: MC33171DR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: mc33171dr2g-etched.step / mc33171dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc33171dr2g.step / mc33171dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (15 pp, sha256 f1e9ff0b61491b0b, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF