component
MC33152VDR2G
Public Made by Adomby adom
onsemi Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC33152VDR2G
onsemi · Gate Drivers · SOIC-8
MC33152VDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N.C. | unconnected | Listed as N.C. (no connection) in the top-view pin connections; the datasheet states no function for this pin. |
| 2 | Logic Input A | input | CMOS/LSTTL-compatible input with 170 mV hysteresis that accepts signals from ground to VCC and has an internal 30 kΩ pulldown so an open input holds its Drive Output low; for optimum switching speed the maximum input voltage should be limited to 10 V or VCC, whichever is less. |
| 3 | GND | power_in | Ground return for the device; the datasheet notes that parasitic ringing can drive the Drive Outputs below ground, which the internal NPN pullup clamps, and recommends a low-inductance ground plane. |
| 4 | Logic Input B | input | CMOS/LSTTL-compatible input with hysteresis that accepts signals from ground to VCC and has an internal 30 kΩ pulldown so an open input holds its Drive Output low; maximum input voltage should be limited to 10 V or VCC, whichever is less, for optimum switching speed. |
| 5 | Drive Output B | output | Totem-pole driver output that sources and sinks up to 1.5 A, with a 100 kΩ pulldown that keeps the gate low when VCC is below 1.4 V and an internal diode clamp to VCC. |
| 6 | VCC | power_in | Supply pin with a stated operating voltage of 6.1 V to 18 V and an absolute maximum of 20 V, with undervoltage lockout forcing the outputs low below the 5.8 V upper threshold. |
| 7 | Drive Output A | output | Totem-pole driver output that sources and sinks up to 1.5 A, with a 100 kΩ pulldown that keeps the gate low when VCC is below 1.4 V and an internal diode clamp to VCC. |
| 8 | N.C. | unconnected | Listed as N.C. (no connection) in the top-view pin connections; the datasheet states no function for this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Threshold Voltage, Output Transition High-to-Low State | VIH | 1.75 | 2.6 | V | 3 | ||
| Input Threshold Voltage, Output Transition Low-to-High State | VIL | 0.8 | 1.58 | V | 3 | ||
| Input Current, High State | IIH | 100 | 300 | µA | VIH = 2.6 V | 3 | |
| Input Current, Low State | IIL | 20 | 100 | µA | VIL = 0.8 V | 3 | |
| Output Voltage, Low State | VOL | 0.8 | 1.2 | V | Isink = 10 mA | 3 | |
| Output Voltage, Low State | VOL | 1.1 | 1.5 | V | Isink = 50 mA | 3 | |
| Output Voltage, Low State | VOL | 1.8 | 2.5 | V | Isink = 400 mA | 3 | |
| Output Voltage, High State | VOH | 10.5 | 11.2 | V | Isource = 10 mA | 3 | |
| Output Voltage, High State | VOH | 10.4 | 11.1 | V | Isource = 50 mA | 3 | |
| Output Voltage, High State | VOH | 10 | 10.8 | V | Isource = 400 mA | 3 | |
| Propagation Delay, Logic Input to Drive Output Rise (10% Input to 10% Output) | tPLH (IN/OUT) | 55 | 120 | ns | CL = 1.0 nF | 3 | |
| Propagation Delay, Logic Input to Drive Output Fall (90% Input to 90% Output) | tPHL (IN/OUT) | 40 | 120 | ns | CL = 1.0 nF | 3 | |
| Drive Output Rise Time (10% to 90%) | tr | 14 | 30 | ns | CL = 1.0 nF | 3 | |
| Drive Output Fall Time (90% to 10%) | tf | 15 | 30 | ns | CL = 1.0 nF | 3 | |
| Power Supply Current, Standby | ICC | 6 | 8 | mA | Logic Inputs Grounded | 3 | |
| Power Supply Current, Operating | ICC | 10.5 | 15 | mA | CL = 1.0 nF Drive Outputs 1 and 2, f = 100 kHz | 3 | |
| Operating Voltage | VCC | 6.1 | 18 | V | 3 | ||
| Undervoltage Lockout Startup Threshold | Vth | 5.8 | 6.1 | V | 3 | ||
| Power Supply Voltage | VCC | 20 | V | 2 | |||
| Logic Inputs | Vin | -0.3 | V | Printed as −0.3 to +VCC; upper limit is +VCC, not a number | 2 | ||
| Drive Outputs, Totem Pole Sink or Source Current | IO | 1.5 | A | 2 | |||
| Drive Outputs, Diode Clamp Current (Drive Output to VCC) | IO(clamp) | 1 | A | 2 | |||
| Maximum Power Dissipation, D Suffix Plastic Package Case 751 | PD | 0.56 | W | TA = 50°C | 2 | ||
| Thermal Resistance, Junction-to-Air, D Suffix Plastic Package Case 751 | RJA | 180 | °C/W | D Suffix, Case 751 | 2 | ||
| Operating Junction Temperature | TJ | 150 | °C | 2 | |||
| Operating Ambient Temperature | TA | -40 | 125 | °C | MC33152V, NCV33152 | 2 | |
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| Electrostatic Discharge Sensitivity, Human Body Model | ESD | 2000 | V | HBM, JEDEC JESD22-A114-F | 2 | ||
| Electrostatic Discharge Sensitivity, Machine Model | ESD | 200 | V | MM, JEDEC JESD22-A115-A | 2 | ||
| Electrostatic Discharge Sensitivity, Charged Device Model | ESD | 1500 | V | CDM, JEDEC JESD22-C101D | 2 |
CAD (KiCad official)
- Symbol:
MC33152VDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mc33152vdr2g-etched.step/mc33152vdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc33152vdr2g.step/mc33152vdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
4c4cfad88ffc78d1, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC33152VDR2G
**onsemi** · Gate Drivers · SOIC-8
MC33152VDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N.C. | unconnected | Listed as N.C. (no connection) in the top-view pin connections; the datasheet states no function for this pin. |
| 2 | Logic Input A | input | CMOS/LSTTL-compatible input with 170 mV hysteresis that accepts signals from ground to VCC and has an internal 30 kΩ pulldown so an open input holds its Drive Output low; for optimum switching speed the maximum input voltage should be limited to 10 V or VCC, whichever is less. |
| 3 | GND | power_in | Ground return for the device; the datasheet notes that parasitic ringing can drive the Drive Outputs below ground, which the internal NPN pullup clamps, and recommends a low-inductance ground plane. |
| 4 | Logic Input B | input | CMOS/LSTTL-compatible input with hysteresis that accepts signals from ground to VCC and has an internal 30 kΩ pulldown so an open input holds its Drive Output low; maximum input voltage should be limited to 10 V or VCC, whichever is less, for optimum switching speed. |
| 5 | Drive Output B | output | Totem-pole driver output that sources and sinks up to 1.5 A, with a 100 kΩ pulldown that keeps the gate low when VCC is below 1.4 V and an internal diode clamp to VCC. |
| 6 | VCC | power_in | Supply pin with a stated operating voltage of 6.1 V to 18 V and an absolute maximum of 20 V, with undervoltage lockout forcing the outputs low below the 5.8 V upper threshold. |
| 7 | Drive Output A | output | Totem-pole driver output that sources and sinks up to 1.5 A, with a 100 kΩ pulldown that keeps the gate low when VCC is below 1.4 V and an internal diode clamp to VCC. |
| 8 | N.C. | unconnected | Listed as N.C. (no connection) in the top-view pin connections; the datasheet states no function for this pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Threshold Voltage, Output Transition High-to-Low State | VIH | | 1.75 | 2.6 | V | | 3 |
| Input Threshold Voltage, Output Transition Low-to-High State | VIL | 0.8 | 1.58 | | V | | 3 |
| Input Current, High State | IIH | | 100 | 300 | µA | VIH = 2.6 V | 3 |
| Input Current, Low State | IIL | | 20 | 100 | µA | VIL = 0.8 V | 3 |
| Output Voltage, Low State | VOL | | 0.8 | 1.2 | V | Isink = 10 mA | 3 |
| Output Voltage, Low State | VOL | | 1.1 | 1.5 | V | Isink = 50 mA | 3 |
| Output Voltage, Low State | VOL | | 1.8 | 2.5 | V | Isink = 400 mA | 3 |
| Output Voltage, High State | VOH | 10.5 | 11.2 | | V | Isource = 10 mA | 3 |
| Output Voltage, High State | VOH | 10.4 | 11.1 | | V | Isource = 50 mA | 3 |
| Output Voltage, High State | VOH | 10 | 10.8 | | V | Isource = 400 mA | 3 |
| Propagation Delay, Logic Input to Drive Output Rise (10% Input to 10% Output) | tPLH (IN/OUT) | | 55 | 120 | ns | CL = 1.0 nF | 3 |
| Propagation Delay, Logic Input to Drive Output Fall (90% Input to 90% Output) | tPHL (IN/OUT) | | 40 | 120 | ns | CL = 1.0 nF | 3 |
| Drive Output Rise Time (10% to 90%) | tr | | 14 | 30 | ns | CL = 1.0 nF | 3 |
| Drive Output Fall Time (90% to 10%) | tf | | 15 | 30 | ns | CL = 1.0 nF | 3 |
| Power Supply Current, Standby | ICC | | 6 | 8 | mA | Logic Inputs Grounded | 3 |
| Power Supply Current, Operating | ICC | | 10.5 | 15 | mA | CL = 1.0 nF Drive Outputs 1 and 2, f = 100 kHz | 3 |
| Operating Voltage | VCC | 6.1 | | 18 | V | | 3 |
| Undervoltage Lockout Startup Threshold | Vth | | 5.8 | 6.1 | V | | 3 |
| Power Supply Voltage | VCC | | | 20 | V | | 2 |
| Logic Inputs | Vin | -0.3 | | | V | Printed as −0.3 to +VCC; upper limit is +VCC, not a number | 2 |
| Drive Outputs, Totem Pole Sink or Source Current | IO | | | 1.5 | A | | 2 |
| Drive Outputs, Diode Clamp Current (Drive Output to VCC) | IO(clamp) | | | 1 | A | | 2 |
| Maximum Power Dissipation, D Suffix Plastic Package Case 751 | PD | | | 0.56 | W | TA = 50°C | 2 |
| Thermal Resistance, Junction-to-Air, D Suffix Plastic Package Case 751 | RJA | | | 180 | °C/W | D Suffix, Case 751 | 2 |
| Operating Junction Temperature | TJ | | | 150 | °C | | 2 |
| Operating Ambient Temperature | TA | -40 | | 125 | °C | MC33152V, NCV33152 | 2 |
| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 2 |
| Electrostatic Discharge Sensitivity, Human Body Model | ESD | | | 2000 | V | HBM, JEDEC JESD22-A114-F | 2 |
| Electrostatic Discharge Sensitivity, Machine Model | ESD | | | 200 | V | MM, JEDEC JESD22-A115-A | 2 |
| Electrostatic Discharge Sensitivity, Charged Device Model | ESD | | | 1500 | V | CDM, JEDEC JESD22-C101D | 2 |
## CAD (KiCad official)
- Symbol: `MC33152VDR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mc33152vdr2g-etched.step` / `mc33152vdr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc33152vdr2g.step` / `mc33152vdr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590908115313508352) (14 pp, sha256 `4c4cfad88ffc78d1`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc33152vdr2g-datasheet.pdf)