# MC33063ADR2G

**onsemi** · DC-DC Converters · SOIC-8

MC33063ADR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Switch Collector | output | Collector of the internal high-current NPN output switch transistor Q1. Rated 40 V, 1.5 A peak. Connects to the switching node of the boost/buck/inverting topology. |
| 2 | Switch Emitter | output | Emitter of the internal output switch transistor Q1. Rated 40 V, 1.5 A peak. Tied to GND for step-up topology or to the switch node for step-down/inverting topologies. |
| 3 | Timing Capacitor | passive | Oscillator timing capacitor pin (CT). External capacitor to GND sets the switching frequency (typ. 24-100 kHz, e.g. 1.0 nF ≈ 33 kHz). |
| 4 | GND | power_in | Device ground / negative power supply return. |
| 5 | Comparator Inverting Input | input | Inverting input of the internal error comparator. Connected to the feedback divider from the regulated output; regulates when the pin reaches the 1.25 V internal reference (Vth typ 1.25 V, 1.225-1.275 V at 25 °C). |
| 6 | VCC | power_in | Positive supply voltage input, 3.0 V to 40 V. Standby supply current typically 3.2 mA (max 4.0 mA). |
| 7 | Ipk Sense | input | Peak switch-current sense input. External sense resistor between VCC and this pin sets the peak switch current limit; the internal comparator trips at Vipk(sense) typ. 300 mV (250-350 mV). |
| 8 | Driver Collector | output | Collector of the internal driver transistor Q2 that drives the base of the output switch Q1. Rated 40 V, 100 mA. Can be tied to VCC for a Darlington configuration or through a resistor to VCC/switch node for a common-emitter configuration. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `MC33063ADR2G`
- `MC33063ADR2GDG`
- `MC33063ADR2GPG`
- `MC33063ADR2GP1G`
- `MC33063ADR2GMNTXG`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Oscillator Frequency | fosc | 24 | 33 | 42 | kHz | VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C | 3 |
| Charge Current | Ichg | 24 | 35 | 42 | A | VCC = 5.0 V to 40 V, TA = 25°C | 3 |
| Discharge Current | Idischg | 140 | 220 | 260 | A | VCC = 5.0 V to 40 V, TA = 25°C | 3 |
| Discharge to Charge Current Ratio | Idischg/Ichg | 5.2 | 6.5 | 7.5 | − | Pin 7 to VCC, TA = 25°C | 3 |
| Current Limit Sense Voltage | Vipk(sense) | 250 | 300 | 350 | mV | Ichg = Idischg, TA = 25°C | 3 |
| Saturation Voltage, Darlington Connection | VCE(sat) |  | 1 | 1.3 | V | ISW = 1.0 A, Pins 1, 8 connected | 3 |
| Saturation Voltage (non-Darlington) | VCE(sat) |  | 0.45 | 0.7 | V | ISW = 1.0 A, RPin 8 = 82 Ω to VCC, Forced β (symbols lost in extraction) 20 | 3 |
| DC Current Gain | hFE | 50 | 75 |  | − | ISW = 1.0 A, VCE = 5.0 V, TA = 25°C | 3 |
| Collector Off-State Current | IC(off) |  | 0.01 | 100 | A | VCE = 40 V | 3 |
| Threshold Voltage | Vth | 1.225 | 1.25 | 1.275 | V | TA = 25°C | 3 |
| Threshold Voltage over temperature | Vth | 1.21 |  | 1.29 | V | TA = Tlow to Thigh | 3 |
| Threshold Voltage Line Regulation | Regline |  | 1.4 | 5 | mV | VCC = 3.0 V to 40 V (MC33063 row) | 3 |
| Input Bias Current | IIB |  | -20 | -400 | nA | Vin = 0 V | 3 |
| Supply Current | ICC |  |  | 4 | mA | VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open | 3 |
| Power Supply Voltage | VCC |  |  | 40 | Vdc |  | 2 |
| Comparator Input Voltage Range | VIR | -0.3 |  | 40 | Vdc |  | 2 |
| Switch Collector Voltage | VC(switch) |  |  | 40 | Vdc |  | 2 |
| Switch Emitter Voltage | VE(switch) |  |  | 40 | Vdc | VPin 1 = 40 V | 2 |
| Switch Collector to Emitter Voltage | VCE(switch) |  |  | 40 | Vdc |  | 2 |
| Driver Collector Voltage | VC(driver) |  |  | 40 | Vdc |  | 2 |
| Driver Collector Current | IC(driver) |  |  | 100 | mA | Note 1 | 2 |
| Switch Current | ISW |  |  | 1.5 | A |  | 2 |
| Operating Ambient Temperature Range (MC33063A, SC33063A) | TA | -40 |  | 85 | °C |  | 2 |
| Operating Junction Temperature | TJ |  |  | 150 | °C |  | 2 |
| Storage Temperature Range | Tstg | -65 |  | 150 | °C |  | 2 |
| Power Dissipation, SOIC package (D suffix) | PD |  |  | 625 | mW | TA = 25°C | 2 |
| Thermal Resistance, junction-to-ambient, SOIC package (D suffix) | RθJA |  |  | 160 | °C/W |  | 2 |

## CAD (KiCad official)

- Symbol: `MC33063ADR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mc33063adr2g-etched.step` / `mc33063adr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc33063adr2g.step` / `mc33063adr2g.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`mc33063adr2g.step`](mc33063adr2g.step) | 122 KB | You want the bare part, or you mark your own boards. |
| [`mc33063adr2g-etched.step`](mc33063adr2g-etched.step) | 2.9 MB | You want the part with `MC33063ADR2G` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 691 faces against 147 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc33063a-d.pdf) (15 pp, sha256 `6a2cb6e527edd54e`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mc33063adr2g-datasheet.pdf)