main
Ray Publish 0.1.0 5ea8f40 8d ago
{
  "slug": "mc14584bdg",
  "version": "0.1.0",
  "type": "component",
  "description": "onsemi Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "mc14584bdg",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "mc14584bdg.kicad_sym",
    "mc14584bdg.kicad_mod",
    "mc14584bdg.glb",
    "mc14584bdg.step",
    "mc14584bdg.lbr",
    "docs/hero.png",
    "docs/mc14584bdg-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "mc14584bdg-hero.glb",
    "mc14584bdg-hero.overlay.json",
    "mc14584bdg-etched.glb"
  ],
  "component": {
    "mpn": "MC14584BDG",
    "manufacturer": "onsemi",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Inverters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589041679920222208",
    "parts": {
      "symbol": "mc14584bdg.kicad_sym",
      "footprint": "mc14584bdg.kicad_mod",
      "model_3d": "mc14584bdg-hero.glb",
      "model_3d_plain": "mc14584bdg-etched.glb",
      "model_3d_step": "mc14584bdg-etched.step",
      "model_3d_step_plain": "mc14584bdg.step",
      "lbr": "mc14584bdg.lbr"
    },
    "distributor_links": {
      "lcsc": "C897259",
      "digikey": "MC14584BDGOS-ND",
      "mouser": "863-MC14584BDG"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T18:00:30Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "MC14584BDGOS-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "863-MC14584BDG",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IN 1",
        "type": "input",
        "description": "Schmitt-trigger inverter 1 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD."
      },
      {
        "number": "2",
        "name": "OUT 1",
        "type": "output",
        "description": "Schmitt-trigger inverter 1 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open."
      },
      {
        "number": "3",
        "name": "IN 2",
        "type": "input",
        "description": "Schmitt-trigger inverter 2 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD."
      },
      {
        "number": "4",
        "name": "OUT 2",
        "type": "output",
        "description": "Schmitt-trigger inverter 2 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open."
      },
      {
        "number": "5",
        "name": "IN 3",
        "type": "input",
        "description": "Schmitt-trigger inverter 3 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD."
      },
      {
        "number": "6",
        "name": "OUT 3",
        "type": "output",
        "description": "Schmitt-trigger inverter 3 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply and reference ground; all voltages in the datasheet are referenced to VSS."
      },
      {
        "number": "8",
        "name": "OUT 4",
        "type": "output",
        "description": "Schmitt-trigger inverter 4 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open."
      },
      {
        "number": "9",
        "name": "IN 4",
        "type": "input",
        "description": "Schmitt-trigger inverter 4 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD."
      },
      {
        "number": "10",
        "name": "OUT 5",
        "type": "output",
        "description": "Schmitt-trigger inverter 5 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open."
      },
      {
        "number": "11",
        "name": "IN 5",
        "type": "input",
        "description": "Schmitt-trigger inverter 5 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD."
      },
      {
        "number": "12",
        "name": "OUT 6",
        "type": "output",
        "description": "Schmitt-trigger inverter 6 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open."
      },
      {
        "number": "13",
        "name": "IN 6",
        "type": "input",
        "description": "Schmitt-trigger inverter 6 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply; the datasheet gives a supply range of 3.0 Vdc to 18 Vdc, with an absolute maximum of +18.0 V referenced to VSS."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The PIN ASSIGNMENT drawing text on page 2 is scrambled in extraction, so the input/output pairing wa; VSS=pin 7 and VDD=pin 14 are stated explicitly in the LOGIC DIAGRAM section on page 2. The VDD and V; The datasheet covers the SOIC-14 package for MC14584BDG (D suffix, CASE 751A). The TSSOP-14 and SOEI"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0539,
        "at": "2026-10-20T17:59:03"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589041679920222208",
        "pages": 7,
        "sha256": "00c18cc076b9bc3e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "mc14584bdg.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "mc14584bdg-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "af2fe9596430bd3da296b1f41c84d410b055dd64dd05fc93284a87e6ab595b0c",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}