component
MC14536BDWR2G
Public Made by Adomby adom
onsemi Timers / Counters, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MC14536BDWR2G
onsemi · Timers / Counters · SOIC-16-300mil
MC14536BDWR2G from onsemi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SET | input | A high on Set asynchronously forces Decode Out high and resets the 24 flip-flop stages, and while high it disables the on-chip RC oscillator. |
| 2 | RESET | input | A high on Reset asynchronously forces Decode Out low and resets all 24 flip-flop stages to low, and it also disables the on-chip RC oscillator. |
| 3 | IN1 | input | The internal counters advance on the negative-going edge of this input, which can be an external clock or part of an RC oscillator with OUT1 and OUT2. |
| 4 | OUT1 | output | Buffered output used with IN1 to form an RC oscillator; when an external clock is used it may be left unconnected or drive 1 LSTTL or several CMOS loads. |
| 5 | OUT2 | output | Buffered output used with IN1 to form an RC oscillator; when an external clock is used it may be left unconnected or drive 1 LSTTL or several CMOS loads. |
| 6 | 8-BYPASS | input | A high on this input bypasses the first eight flip-flop stages, leaving a 16-stage counter with all 16 stages selectable by A, B, C and D. |
| 7 | CLOCK INHIBIT | input | A high on this input disconnects the first counter stage from the clocking source, holding the present count while the clocking source may keep running. |
| 8 | VSS | power_in | Ground reference pin; all voltages in the datasheet are referenced to VSS. |
| 9 | A | input | Together with B, C and D, selects the flip-flop stage connected to Decode Out as given in the truth tables. |
| 10 | B | input | Together with A, C and D, selects the flip-flop stage connected to Decode Out as given in the truth tables. |
| 11 | C | input | Together with A, B and D, selects the flip-flop stage connected to Decode Out as given in the truth tables. |
| 12 | D | input | Together with A, B and C, selects the flip-flop stage connected to Decode Out as given in the truth tables. |
| 13 | DECODE OUT | output | Output function depends on configuration; with the monostable disabled it is a 50% duty cycle square wave during free run. |
| 14 | OSC INHIBIT | input | A high level stops the RC oscillator for very low-power standby operation, and it can also be used with an external clock much like Clock Inhibit. |
| 15 | MONO-IN | passive | Timing pin for the on-chip monostable: tying it to VSS disables the monostable, while a resistor to VDD enables it, with the resistor limited to 5 k to 100 k and the external capacitor to a maximum of 1000 pF. |
| 16 | VDD | power_in | Positive supply pin; the device supply range is 3.0 Vdc to 18 Vdc, with a maximum DC supply rating of −0.5 to +18.0 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16-300mil |
| Category | Clock/Timing |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage Range | VDD | -0.5 | 18 | V | Voltages referenced to VSS | 1 | |
| Input or Output Voltage Range (DC or Transient) | Vin, Vout | -0.5 | V | Upper limit printed as VDD + 0.5; referenced to VSS | 1 | ||
| Input or Output Current (DC or Transient) per Pin | Iin, Iout | -10 | 10 | mA | Per pin; printed as ±10 mA | 1 | |
| Power Dissipation per Package | PD | 500 | mW | Per package (Note 1) | 1 | ||
| Ambient Temperature Range | TA | -55 | 125 | °C | 1 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 1 | ||
| Lead Temperature (8-Second Soldering) | TL | 260 | °C | 8-second soldering | 1 | ||
| Supply Voltage Range | VDD | 3 | 18 | Vdc | Stated in Features list | 1 | |
| Output Voltage 0 Level | VOL | 0.05 | Vdc | VDD = 5.0 Vdc; Vin = VDD or 0; TA = -55C | 3 | ||
| Output Voltage 0 Level | VOL | 0 | 0.05 | Vdc | VDD = 5.0 Vdc; Vin = VDD or 0; TA = 25C | 3 | |
| Output Voltage 1 Level | VOH | 4.95 | Vdc | VDD = 5.0 Vdc; Vin = 0 or VDD; TA = -55C | 3 | ||
| Output Voltage 1 Level | VOH | 4.95 | 5 | Vdc | VDD = 5.0 Vdc; Vin = 0 or VDD; TA = 25C | 3 | |
| Output Voltage 1 Level | VOH | 9.95 | Vdc | VDD = 10 Vdc; Vin = 0 or VDD; TA = -55C | 3 | ||
| Output Voltage 1 Level | VOH | 9.95 | 10 | Vdc | VDD = 10 Vdc; Vin = 0 or VDD; TA = 25C | 3 | |
| Output Voltage 1 Level | VOH | 14.95 | Vdc | VDD = 15 Vdc; Vin = 0 or VDD; TA = -55C | 3 | ||
| Output Voltage 1 Level | VOH | 14.95 | 15 | Vdc | VDD = 15 Vdc; Vin = 0 or VDD; TA = 25C | 3 | |
| Input Voltage 0 Level | VIL | 1.5 | Vdc | VDD = 5.0 Vdc; (VO = 4.5 or 0.5 Vdc); TA = -55C | 3 | ||
| Input Voltage 0 Level | VIL | 2.25 | 1.5 | Vdc | VDD = 5.0 Vdc; (VO = 4.5 or 0.5 Vdc); TA = 25C | 3 | |
| Input Voltage 0 Level | VIL | 3 | Vdc | VDD = 10 Vdc; (VO = 9.0 or 1.0 Vdc); TA = -55C | 3 | ||
| Input Voltage 0 Level | VIL | 4.5 | 3 | Vdc | VDD = 10 Vdc; (VO = 9.0 or 1.0 Vdc); TA = 25C | 3 | |
| Input Voltage 0 Level | VIL | 4 | Vdc | VDD = 15 Vdc; (VO = 13.5 or 1.5 Vdc); TA = -55C | 3 | ||
| Input Voltage 0 Level | VIL | 6.75 | 4 | Vdc | VDD = 15 Vdc; (VO = 13.5 or 1.5 Vdc); TA = 25C | 3 | |
| Input Voltage 1 Level | VIH | 3.5 | Vdc | VDD = 5.0 Vdc; (VO = 0.5 or 4.5 Vdc); TA = -55C | 3 | ||
| Input Voltage 1 Level | VIH | 3.5 | 2.75 | Vdc | VDD = 5.0 Vdc; (VO = 0.5 or 4.5 Vdc); TA = 25C | 3 | |
| Input Voltage 1 Level | VIH | 7 | Vdc | VDD = 10 Vdc; (VO = 1.0 or 9.0 Vdc); TA = -55C | 3 | ||
| Input Voltage 1 Level | VIH | 7 | 5.5 | Vdc | VDD = 10 Vdc; (VO = 1.0 or 9.0 Vdc); TA = 25C | 3 | |
| Input Voltage 1 Level | VIH | 11 | Vdc | VDD = 15 Vdc; (VO = 1.5 or 13.5 Vdc); TA = -55C | 3 | ||
| Input Voltage 1 Level | VIH | 11 | 8.25 | Vdc | VDD = 15 Vdc; (VO = 1.5 or 13.5 Vdc); TA = 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 5 | Adc | VDD = 5.0 Vdc; TA = -55C | 3 | ||
| Quiescent Current (Per Package) | IDD | 0.01 | 5 | Adc | VDD = 5.0 Vdc; TA = 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 150 | Adc | VDD = 5.0 Vdc; TA = 125C | 3 | ||
| Quiescent Current (Per Package) | IDD | 10 | Adc | VDD = 10 Vdc; TA = -55C | 3 | ||
| Quiescent Current (Per Package) | IDD | 0.02 | 10 | Adc | VDD = 10 Vdc; TA = 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 300 | Adc | VDD = 10 Vdc; TA = 125C | 3 | ||
| Quiescent Current (Per Package) | IDD | 20 | Adc | VDD = 15 Vdc; TA = -55C | 3 | ||
| Quiescent Current (Per Package) | IDD | 0.03 | 20 | Adc | VDD = 15 Vdc; TA = 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 600 | Adc | VDD = 15 Vdc; TA = 125C | 3 | ||
| Input Current | Iin | -0.1 | 0.1 | Adc | VDD = 15 Vdc; TA = -55C | 3 | |
| Input Current | Iin | -0.1 | 1e-05 | 0.1 | Adc | VDD = 15 Vdc; TA = 25C | 3 |
| Input Current | Iin | -1 | 1 | Adc | VDD = 15 Vdc; TA = 125C | 3 | |
| Input Capacitance | Cin | 5 | 7.5 | pF | Vin = 0 | 3 | |
| Output Drive Temperature Derating (D/DW packages) | -7 | mW/C | From 65C to 125C (Note 1) | 1 |
CAD (KiCad official)
- Symbol:
MC14536BDWR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
mc14536bdwr2g-etched.step/mc14536bdwr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc14536bdwr2g.step/mc14536bdwr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (15 pp, sha256
8275d9a502a7e313, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).