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MC14094BDR2G
Public Made by Adomby adom
onsemi Shift Registers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MC14094BDR2G
onsemi · Shift Registers · SOIC-16
MC14094BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | STROBE | input | Strobe input: data is latched on the negative transition of strobe, and data propagates through the latches while strobe is high. |
| 2 | DATA | input | Serial data input to shift register stage 1, shifted in on the positive clock transition. |
| 3 | CLOCK | input | Clock input: data shifts on the positive clock transition, and the Q'S serial output shifts on the following negative transition. |
| 4 | Q1 | tri_state | Parallel 3-state output of data latch 1, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 5 | Q2 | tri_state | Parallel 3-state output of data latch 2, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 6 | Q3 | tri_state | Parallel 3-state output of data latch 3, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 7 | Q4 | tri_state | Parallel 3-state output of data latch 4, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 8 | VSS | power_in | Negative supply and voltage reference for all ratings; inputs and outputs must stay within VSS ≤ (Vin or Vout) ≤ VDD. |
| 9 | QS | output | High-speed serial output from shift register stage 7, updated on the positive clock transition for cascaded systems. |
| 10 | Q'S | output | Low-speed serial output from shift register stage 7, shifted on the following negative clock transition for cascaded systems. |
| 11 | Q8 | tri_state | Parallel 3-state output of data latch 8, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 12 | Q7 | tri_state | Parallel 3-state output of data latch 7, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 13 | Q6 | tri_state | Parallel 3-state output of data latch 6, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 14 | Q5 | tri_state | Parallel 3-state output of data latch 5, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 15 | OUTPUT ENABLE | input | A logic Low forces parallel outputs Q1 through Q8 into the high-impedance state; a logic High enables them. |
| 16 | VDD | power_in | Positive supply; the DC supply voltage range is −0.5 V to +18.0 V with respect to VSS (maximum ratings). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
MC14094BDR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
mc14094bdr2g-etched.step/mc14094bdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc14094bdr2g.step/mc14094bdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
356c23430343651d, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC14094BDR2G
**onsemi** · Shift Registers · SOIC-16
MC14094BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | STROBE | input | Strobe input: data is latched on the negative transition of strobe, and data propagates through the latches while strobe is high. |
| 2 | DATA | input | Serial data input to shift register stage 1, shifted in on the positive clock transition. |
| 3 | CLOCK | input | Clock input: data shifts on the positive clock transition, and the Q'S serial output shifts on the following negative transition. |
| 4 | Q1 | tri_state | Parallel 3-state output of data latch 1, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 5 | Q2 | tri_state | Parallel 3-state output of data latch 2, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 6 | Q3 | tri_state | Parallel 3-state output of data latch 3, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 7 | Q4 | tri_state | Parallel 3-state output of data latch 4, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 8 | VSS | power_in | Negative supply and voltage reference for all ratings; inputs and outputs must stay within VSS ≤ (Vin or Vout) ≤ VDD. |
| 9 | QS | output | High-speed serial output from shift register stage 7, updated on the positive clock transition for cascaded systems. |
| 10 | Q'S | output | Low-speed serial output from shift register stage 7, shifted on the following negative clock transition for cascaded systems. |
| 11 | Q8 | tri_state | Parallel 3-state output of data latch 8, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 12 | Q7 | tri_state | Parallel 3-state output of data latch 7, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 13 | Q6 | tri_state | Parallel 3-state output of data latch 6, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 14 | Q5 | tri_state | Parallel 3-state output of data latch 5, placed in high impedance by a logic Low on Output Enable; rated to drive two low-power TTL loads over the rated temperature range. |
| 15 | OUTPUT ENABLE | input | A logic Low forces parallel outputs Q1 through Q8 into the high-impedance state; a logic High enables them. |
| 16 | VDD | power_in | Positive supply; the DC supply voltage range is −0.5 V to +18.0 V with respect to VSS (maximum ratings). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `MC14094BDR2G`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `mc14094bdr2g-etched.step` / `mc14094bdr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc14094bdr2g.step` / `mc14094bdr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194462075211776) (9 pp, sha256 `356c23430343651d`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc14094bdr2g-datasheet.pdf)