# MC14093BDTR2G

**onsemi** · Logic Gates · TSSOP-14

MC14093BDTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN 1A | input | Input 1A of Schmitt-trigger NAND gate A; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 2 | IN 1B | input | Input 1B of Schmitt-trigger NAND gate A; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 3 | OUTA | output | Output of NAND gate A; rated for ±10 mA maximum per pin, and unused outputs must be left open. |
| 4 | OUTB | output | Output of NAND gate B; rated for ±10 mA maximum per pin, and unused outputs must be left open. |
| 5 | IN 2A | input | Input 2A of Schmitt-trigger NAND gate B; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 6 | IN 2B | input | Input 2B of Schmitt-trigger NAND gate B; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 7 | VSS | power_in | Negative supply and reference node for all voltages; all voltage ratings are referenced to VSS. |
| 8 | IN 1C | input | Input 1C of Schmitt-trigger NAND gate C; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 9 | IN 2C | input | Input 2C of Schmitt-trigger NAND gate C; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 10 | OUTC | output | Output of NAND gate C; rated for ±10 mA maximum per pin, and unused outputs must be left open. |
| 11 | OUTD | output | Output of NAND gate D; rated for ±10 mA maximum per pin, and unused outputs must be left open. |
| 12 | IN 2D | input | Input 2D of Schmitt-trigger NAND gate D; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 13 | IN 1D | input | Input 1D of Schmitt-trigger NAND gate D; inputs must be held between VSS and VDD (VSS ≤ Vin ≤ VDD) and unused inputs must be tied to VSS or VDD. |
| 14 | VDD | power_in | Positive supply; the datasheet specifies a supply range of 3.0 Vdc to 18 Vdc (absolute maximum −0.5 to +18.0 V) referenced to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage '0' Level | VOL |  | 0 | 0.05 | Vdc | VDD = 5.0 Vdc; Vin = VDD or 0; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Output Voltage '1' Level | VOH | 4.95 | 5 |  | Vdc | VDD = 5.0 Vdc; Vin = 0 or VDD; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Output Voltage '1' Level | VOH | 9.95 | 10 |  | Vdc | VDD = 10 Vdc; Vin = 0 or VDD; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Output Voltage '1' Level | VOH | 14.95 | 15 |  | Vdc | VDD = 15 Vdc; Vin = 0 or VDD; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Output Drive Current Source | IOH | -3 |  |  | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = -55°C | 4 |
| Output Drive Current Source | IOH | -2.4 | -4.2 |  | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Source | IOH | -1.7 |  |  | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = 125°C | 4 |
| Output Drive Current Source | IOH | -0.64 |  |  | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = -55°C | 4 |
| Output Drive Current Source | IOH | -0.51 | -0.88 |  | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Source | IOH | -0.36 |  |  | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = 125°C | 4 |
| Output Drive Current Source | IOH | -1.6 |  |  | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = -55°C | 4 |
| Output Drive Current Source | IOH | -1.3 | -2.25 |  | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Source | IOH | -0.9 |  |  | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = 125°C | 4 |
| Output Drive Current Source | IOH | -4.2 |  |  | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = -55°C | 4 |
| Output Drive Current Source | IOH | -3.4 | -8.8 |  | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Source | IOH | -2.4 |  |  | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = 125°C | 4 |
| Output Drive Current Sink | IOL | 0.64 |  |  | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = -55°C | 4 |
| Output Drive Current Sink | IOL | 0.51 | 0.88 |  | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Sink | IOL | 0.36 |  |  | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = 125°C | 4 |
| Output Drive Current Sink | IOL | 1.6 |  |  | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = -55°C | 4 |
| Output Drive Current Sink | IOL | 1.3 | 2.25 |  | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Sink | IOL | 0.9 |  |  | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = 125°C | 4 |
| Output Drive Current Sink | IOL | 4.2 |  |  | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = -55°C | 4 |
| Output Drive Current Sink | IOL | 3.4 | 8.8 |  | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = 25°C (typ at 25°C) | 4 |
| Output Drive Current Sink | IOL | 2.4 |  |  | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = 125°C | 4 |
| Input Current | Iin | -0.1 | 1e-05 | 0.1 | Adc | VDD = 15 Vdc; limits at -55°C and 25°C (typ ±0.00001 at 25°C) | 4 |
| Input Current | Iin | -1 |  | 1 | Adc | VDD = 15 Vdc; TA = 125°C | 4 |
| Input Capacitance | Cin |  | 5 | 7.5 | pF | Vin = 0 | 4 |
| Quiescent Current (Per Package) | IDD |  | 0.0005 | 0.25 | Adc | VDD = 5.0 Vdc; limits at -55°C and 25°C (typ at 25°C) | 4 |
| Quiescent Current (Per Package) | IDD |  |  | 7.5 | Adc | VDD = 5.0 Vdc; TA = 125°C | 4 |
| Quiescent Current (Per Package) | IDD |  | 0.001 | 0.5 | Adc | VDD = 10 Vdc; limits at -55°C and 25°C (typ at 25°C) | 4 |
| Quiescent Current (Per Package) | IDD |  |  | 15 | Adc | VDD = 10 Vdc; TA = 125°C | 4 |
| Quiescent Current (Per Package) | IDD |  | 0.0015 | 1 | Adc | VDD = 15 Vdc; limits at -55°C and 25°C (typ at 25°C) | 4 |
| Quiescent Current (Per Package) | IDD |  |  | 30 | Adc | VDD = 15 Vdc; TA = 125°C | 4 |
| Hysteresis Voltage | VH | 0.3 | 1.1 | 2 | Vdc | VDD = 5.0 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Hysteresis Voltage | VH | 1.2 | 1.7 | 3.4 | Vdc | VDD = 10 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Hysteresis Voltage | VH | 1.6 | 2.1 | 5 | Vdc | VDD = 15 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Threshold Voltage Positive-Going | VT+ | 2.2 | 2.9 | 3.6 | Vdc | VDD = 5.0 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Threshold Voltage Positive-Going | VT+ | 4.6 | 5.9 | 7.1 | Vdc | VDD = 10 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Threshold Voltage Positive-Going | VT+ | 6.8 | 8.8 | 10.8 | Vdc | VDD = 15 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Threshold Voltage Negative-Going | VT- | 0.9 | 1.9 | 2.8 | Vdc | VDD = 5.0 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Threshold Voltage Negative-Going | VT- | 2.5 | 3.9 | 5.2 | Vdc | VDD = 10 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Threshold Voltage Negative-Going | VT- | 4 | 5.8 | 7.4 | Vdc | VDD = 15 Vdc; limits at -55°C, 25°C, 125°C (typ at 25°C) | 4 |
| Output Rise Time | tTLH |  | 100 | 200 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 5 |
| Output Rise Time | tTLH |  | 50 | 100 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 5 |
| Output Rise Time | tTLH |  | 40 | 80 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 5 |
| Output Fall Time | tTHL |  | 100 | 200 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 5 |
| Output Fall Time | tTHL |  | 50 | 100 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 5 |
| Output Fall Time | tTHL |  | 40 | 80 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 5 |
| Propagation Delay Time | tPLH, tPHL |  | 125 | 250 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 5 |
| Propagation Delay Time | tPLH, tPHL |  | 50 | 100 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 5 |
| Propagation Delay Time | tPLH, tPHL |  | 40 | 80 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 5 |
| DC Supply Voltage Range | VDD | -0.5 |  | 18 | V | Voltages referenced to VSS | 2 |
| Input or Output Voltage Range (DC or Transient) | Vin, Vout | -0.5 |  |  | V | Upper limit printed as VDD + 0.5 V | 2 |
| Input or Output Current (DC or Transient) per pin | Iin, Iout | -10 |  | 10 | mA | Per pin; printed as ±10 mA | 2 |
| Power Dissipation per package | PD |  |  | 500 | mW | Per package (Note 1) | 2 |
| Ambient Temperature Range | TA | -55 |  | 125 | °C |  | 2 |
| Supply Voltage Range | VDD | 3 |  | 18 | Vdc | Stated in Features as supply voltage range | 2 |

## CAD (KiCad official)

- Symbol: `MC14093BDTR2G`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `mc14093bdtr2g-etched.step` / `mc14093bdtr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc14093bdtr2g.step` / `mc14093bdtr2g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883665190834176) (9 pp, sha256 `f5ad606793960739`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mc14093bdtr2g-datasheet.pdf)