component

MC14093BDG

Public Made by Adom

by adom

onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmc14093bdgfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers mc14093bdg: viewers · Ray 8d ago
mc14093bdg-etched.glb Publish 0.1.0 · Ray 8d ago
mc14093bdg-etched.step mc14093bdg: factory component page (tier=mfr) · Ray 8d ago
mc14093bdg-hero.glb mc14093bdg: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
mc14093bdg-hero.overlay.json Publish 0.1.0 · Ray 8d ago
mc14093bdg.glb Publish 0.1.0 · Ray 8d ago
mc14093bdg.kicad_mod Publish 0.1.0 · Ray 8d ago
mc14093bdg.kicad_sym Publish 0.1.0 · Ray 8d ago
mc14093bdg.lbr Publish 0.1.0 · Ray 8d ago
mc14093bdg.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

MC14093BDG

onsemi · Gates · SOIC-14

MC14093BDG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN 1A input Gate A input 1 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
2 IN 2A input Gate A input 2 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
3 OUTA output Gate A NAND output that can drive two low-power TTL loads or one low-power Schottky TTL load; leave open if unused.
4 OUTB output Gate B NAND output that can drive two low-power TTL loads or one low-power Schottky TTL load; leave open if unused.
5 IN 1B input Gate B input 1 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
6 IN 2B input Gate B input 2 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
7 VSS power_in Negative supply (ground) reference for all voltages.
8 IN 1C input Gate C input 1 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
9 IN 2C input Gate C input 2 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
10 OUTC output Gate C NAND output that can drive two low-power TTL loads or one low-power Schottky TTL load; leave open if unused.
11 OUTD output Gate D NAND output that can drive two low-power TTL loads or one low-power Schottky TTL load; leave open if unused.
12 IN 1D input Gate D input 1 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
13 IN 2D input Gate D input 2 with Schmitt trigger and triple diode protection; tie to VSS or VDD if unused, and keep within VSS to VDD.
14 VDD power_in Positive supply, 3.0 Vdc to 18 Vdc (absolute maximum -0.5 to +18.0 V referenced to VSS).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage Range VDD -0.5 18 V Referenced to VSS 2
Input or Output Current per Pin Iin, Iout -10 10 mA DC or transient, per pin 2
Power Dissipation per Package PD 500 mW Note 1: D package derate -7.0 mW/C from 65C to 125C 2
Ambient Temperature Range TA -55 125 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Lead Temperature TL 260 °C 8-second soldering 2
Supply Voltage Range VDD 3 18 Vdc Features 2
Output Voltage 0 Level VOL 0 0.05 Vdc Vin = VDD or 0; VDD = 5.0, 10, 15 V; -55C, 25C, 125C 4
Output Voltage 1 Level VOH 4.95 5 Vdc Vin = 0 or VDD; VDD = 5.0 V; 25C 4
Output Voltage 1 Level VOH 9.95 10 Vdc Vin = 0 or VDD; VDD = 10 V; 25C 4
Output Voltage 1 Level VOH 14.95 15 Vdc Vin = 0 or VDD; VDD = 15 V; 25C 4
Output Source Current IOH -2.4 -4.2 mAdc VOH = 2.5 Vdc; VDD = 5.0 V; 25C 4
Output Source Current IOH -0.51 -0.88 mAdc VOH = 4.6 Vdc; VDD = 5.0 V; 25C 4
Output Source Current IOH -1.3 -2.25 mAdc VOH = 9.5 Vdc; VDD = 10 V; 25C 4
Output Source Current IOH -3.4 -8.8 mAdc VOH = 13.5 Vdc; VDD = 15 V; 25C 4
Output Sink Current IOL 0.51 0.88 mAdc VOL = 0.4 Vdc; VDD = 5.0 V; 25C 4
Output Sink Current IOL 1.3 2.25 mAdc VOL = 0.5 Vdc; VDD = 10 V; 25C 4
Output Sink Current IOL 3.4 8.8 mAdc VOL = 1.5 Vdc; VDD = 15 V; 25C 4
Input Current Iin -0.1 1e-05 0.1 µAdc VDD = 15 V; 25C (typ printed ±0.00001) 4
Input Current Iin -1 1 µAdc VDD = 15 V; 125C 4
Input Capacitance Cin 5 7.5 pF Vin = 0; 25C 4
Quiescent Current (Per Package) IDD 0.0005 0.25 µAdc VDD = 5.0 V; 25C 4
Quiescent Current (Per Package) IDD 0.001 0.5 µAdc VDD = 10 V; 25C 4
Quiescent Current (Per Package) IDD 0.0015 1 µAdc VDD = 15 V; 25C 4
Quiescent Current (Per Package) IDD 7.5 µAdc VDD = 5.0 V; 125C 4
Quiescent Current (Per Package) IDD 15 µAdc VDD = 10 V; 125C 4
Quiescent Current (Per Package) IDD 30 µAdc VDD = 15 V; 125C 4
Hysteresis Voltage VH 0.3 1.1 2 Vdc VDD = 5.0 V; 25C 4
Hysteresis Voltage VH 1.2 1.7 3.4 Vdc VDD = 10 V; 25C 4
Hysteresis Voltage VH 1.6 2.1 5 Vdc VDD = 15 V; 25C 4
Positive-Going Threshold Voltage VT+ 2.2 2.9 3.6 Vdc VDD = 5.0 V; 25C 4
Positive-Going Threshold Voltage VT+ 4.6 5.9 7.1 Vdc VDD = 10 V; 25C 4
Positive-Going Threshold Voltage VT+ 6.8 8.8 10.8 Vdc VDD = 15 V; 25C 4
Negative-Going Threshold Voltage VT- 0.9 1.9 2.8 Vdc VDD = 5.0 V; 25C 4
Negative-Going Threshold Voltage VT- 2.5 3.9 5.2 Vdc VDD = 10 V; 25C 4
Negative-Going Threshold Voltage VT- 4 5.8 7.4 Vdc VDD = 15 V; 25C 4
Output Rise Time tTLH 100 200 ns VDD = 5.0 V; CL = 50 pF, TA = 25C 5
Output Rise Time tTLH 50 100 ns VDD = 10 V; CL = 50 pF, TA = 25C 5
Output Rise Time tTLH 40 80 ns VDD = 15 V; CL = 50 pF, TA = 25C 5
Output Fall Time tTHL 100 200 ns VDD = 5.0 V; CL = 50 pF, TA = 25C 5
Output Fall Time tTHL 50 100 ns VDD = 10 V; CL = 50 pF, TA = 25C 5
Output Fall Time tTHL 40 80 ns VDD = 15 V; CL = 50 pF, TA = 25C 5
Propagation Delay Time tPLH, tPHL 125 250 ns VDD = 5.0 V; CL = 50 pF, TA = 25C 5
Propagation Delay Time tPLH, tPHL 50 100 ns VDD = 10 V; CL = 50 pF, TA = 25C 5
Propagation Delay Time tPLH, tPHL 40 80 ns VDD = 15 V; CL = 50 pF, TA = 25C 5

CAD (KiCad official)

  • Symbol: MC14093BDG
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc14093bdg-etched.step / mc14093bdg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc14093bdg.step / mc14093bdg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (9 pp, sha256 f5ad606793960739, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF