main
Ray pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) c22a21b
{
 "schema": "adom.pads/1",
 "slug": "mc14081bdr2g",
 "footprint": "SOIC-14_3.9x8.7mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -3.81
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9"
 },
 "pad_count": 14,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "IN1A",
   "type": "input",
   "description": "Gate A input 1. CMOS logic input, VIL max 1.5 V @ VDD=5 V, VIH min 3.5 V @ VDD=5 V. Unused inputs of AND gates must be tied to VDD.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "IN2A",
   "type": "input",
   "description": "Gate A input 2. CMOS logic input paired with IN1A to produce OUTA = IN1A AND IN2A.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "OUTA",
   "type": "output",
   "description": "Gate A buffered output. OUTA = IN1A AND IN2A. Capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "OUTB",
   "type": "output",
   "description": "Gate B buffered output. OUTB = IN1B AND IN2B.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "IN1B",
   "type": "input",
   "description": "Gate B input 1. CMOS logic input, paired with IN2B.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "IN2B",
   "type": "input",
   "description": "Gate B input 2. CMOS logic input, paired with IN1B.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "VSS",
   "type": "power_in",
   "description": "Negative supply / ground reference for the package. All voltages in the datasheet are referenced to VSS. Typically tied to 0 V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "IN1C",
   "type": "input",
   "description": "Gate C input 1. CMOS logic input, paired with IN2C.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "IN2C",
   "type": "input",
   "description": "Gate C input 2. CMOS logic input, paired with IN1C.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "OUTC",
   "type": "output",
   "description": "Gate C buffered output. OUTC = IN1C AND IN2C.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "OUTD",
   "type": "output",
   "description": "Gate D buffered output. OUTD = IN1D AND IN2D.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "IN1D",
   "type": "input",
   "description": "Gate D input 1. CMOS logic input, paired with IN2D.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "IN2D",
   "type": "input",
   "description": "Gate D input 2. CMOS logic input, paired with IN1D.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "VDD",
   "type": "power_in",
   "description": "Positive supply voltage. Operating range 3.0 V to 18 V (absolute max -0.5 V to +18 V referenced to VSS). Bypass with a local decoupling capacitor to VSS.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}