component
MC14081BDG
Public Made by Adomby adom
onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
MC14081BDG
onsemi · Gates · SOIC-14
MC14081BDG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN 1A | input | Gate A input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 2 | IN 2A | input | Gate A input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 3 | OUTA | output | Buffered output of gate A; unused outputs must be left open, max ±10 mA per pin. |
| 4 | OUTB | output | Buffered output of gate B; unused outputs must be left open, max ±10 mA per pin. |
| 5 | IN 1B | input | Gate B input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 6 | IN 2B | input | Gate B input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 7 | VSS | power_in | Negative supply / ground reference for all voltages (VSS = pin 7 for all devices). |
| 8 | IN 1C | input | Gate C input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 9 | IN 2C | input | Gate C input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 10 | OUTC | output | Buffered output of gate C; unused outputs must be left open, max ±10 mA per pin. |
| 11 | OUTD | output | Buffered output of gate D; unused outputs must be left open, max ±10 mA per pin. |
| 12 | IN 1D | input | Gate D input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 13 | IN 2D | input | Gate D input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 14 | VDD | power_in | Positive supply, 3.0 Vdc to 18 Vdc (absolute max −0.5 to +18.0 V); VDD = pin 14 for all devices. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage 0 Level -55C | VOL | 0.05 | Vdc | Vin = VDD or 0, VDD=5/10/15 V, TA=-55C | 3 | ||
| Output Voltage 0 Level 25C | VOL | 0 | 0.05 | Vdc | Vin = VDD or 0, VDD=5/10/15 V, TA=25C | 3 | |
| Output Voltage 0 Level 125C | VOL | 0.05 | Vdc | Vin = VDD or 0, VDD=5/10/15 V, TA=125C | 3 | ||
| Output Voltage 1 Level 5V -55C | VOH | 4.95 | Vdc | Vin = 0 or VDD, VDD=5.0 V, TA=-55C | 3 | ||
| Output Voltage 1 Level 5V 25C | VOH | 4.95 | 5 | Vdc | Vin = 0 or VDD, VDD=5.0 V, TA=25C | 3 | |
| Output Voltage 1 Level 5V 125C | VOH | 4.95 | Vdc | Vin = 0 or VDD, VDD=5.0 V, TA=125C | 3 | ||
| Output Voltage 1 Level 10V | VOH | 9.95 | 10 | Vdc | Vin = 0 or VDD, VDD=10 V, all temperatures | 3 | |
| Output Voltage 1 Level 15V | VOH | 14.95 | 15 | Vdc | Vin = 0 or VDD, VDD=15 V, all temperatures | 3 | |
| Input Voltage 0 Level 5V | VIL | 2.25 | 1.5 | Vdc | VO = 4.5 or 0.5 Vdc, VDD=5.0 V | 3 | |
| Input Voltage 0 Level 10V | VIL | 4.5 | 3 | Vdc | VO = 9.0 or 1.0 Vdc, VDD=10 V | 3 | |
| Input Voltage 0 Level 15V | VIL | 6.75 | 4 | Vdc | VO = 13.5 or 1.5 Vdc, VDD=15 V | 3 | |
| Input Voltage 1 Level 5V | VIH | 3.5 | 2.75 | Vdc | VO = 0.5 or 4.5 Vdc, VDD=5.0 V | 3 | |
| Input Voltage 1 Level 10V | VIH | 7 | 5.5 | Vdc | VO = 1.0 or 9.0 Vdc, VDD=10 V | 3 | |
| Input Voltage 1 Level 15V | VIH | 11 | 8.25 | Vdc | VO = 1.5 or 13.5 Vdc, VDD=15 V | 3 | |
| Source current 5V VOH 2.5V | IOH | -3 | -4.2 | mAdc | VOH = 2.5 Vdc, VDD=5.0 V, TA=-55C (min); 25C min -2.4; 125C min -1.7 | 3 | |
| Source current 5V VOH 4.6V | IOH | -0.64 | -0.88 | mAdc | VOH = 4.6 Vdc, VDD=5.0 V, TA=-55C (min); 25C min -0.51; 125C min -0.36 | 3 | |
| Source current 10V | IOH | -1.6 | -2.25 | mAdc | VOH = 9.5 Vdc, VDD=10 V, TA=-55C (min); 25C min -1.3; 125C min -0.9 | 3 | |
| Source current 15V | IOH | -4.2 | -8.8 | mAdc | VOH = 13.5 Vdc, VDD=15 V, TA=-55C (min); 25C min -3.4; 125C min -2.4 | 3 | |
| Sink current 5V | IOL | 0.64 | 0.88 | mAdc | VOL = 0.4 Vdc, VDD=5.0 V, TA=-55C (min); 25C min 0.51; 125C min 0.36 | 3 | |
| Sink current 10V | IOL | 1.6 | 2.25 | mAdc | VOL = 0.5 Vdc, VDD=10 V, TA=-55C (min); 25C min 1.3; 125C min 0.9 | 3 | |
| Sink current 15V | IOL | 4.2 | 8.8 | mAdc | VOL = 1.5 Vdc, VDD=15 V, TA=-55C (min); 25C min 3.4; 125C min 2.4 | 3 | |
| Input Current -55C | Iin | -0.1 | 0.1 | Adc | VDD=15 V, TA=-55C | 3 | |
| Input Current 25C | Iin | -0.1 | 1e-05 | 0.1 | Adc | VDD=15 V, TA=25C (typ ±0.00001) | 3 |
| Input Current 125C | Iin | -1 | 1 | Adc | VDD=15 V, TA=125C | 3 | |
| Input Capacitance | Cin | 5 | 7.5 | pF | Vin = 0, TA=25C | 3 | |
| Quiescent Current 5V 25C | IDD | 0.0005 | 0.25 | Adc | VDD=5.0 V, per package, TA=-55C and 25C max 0.25 | 3 | |
| Quiescent Current 10V 25C | IDD | 0.001 | 0.5 | Adc | VDD=10 V, per package, TA=-55C and 25C max 0.5 | 3 | |
| Quiescent Current 15V 25C | IDD | 0.0015 | 1 | Adc | VDD=15 V, per package, TA=-55C and 25C max 1.0 | 3 | |
| Quiescent Current 5V 125C | IDD | 7.5 | Adc | VDD=5.0 V, TA=125C | 3 | ||
| Quiescent Current 10V 125C | IDD | 15 | Adc | VDD=10 V, TA=125C | 3 | ||
| Quiescent Current 15V 125C | IDD | 30 | Adc | VDD=15 V, TA=125C | 3 | ||
| Output Rise Time 5V | tTLH | 100 | 200 | ns | VDD=5.0 V, CL=50 pF, TA=25C | 4 | |
| Output Rise Time 10V | tTLH | 50 | 100 | ns | VDD=10 V, CL=50 pF, TA=25C | 4 | |
| Output Rise Time 15V | tTLH | 40 | 80 | ns | VDD=15 V, CL=50 pF, TA=25C | 4 | |
| Output Fall Time 5V | tTHL | 100 | 200 | ns | VDD=5.0 V, CL=50 pF, TA=25C | 4 | |
| Output Fall Time 10V | tTHL | 50 | 100 | ns | VDD=10 V, CL=50 pF, TA=25C | 4 | |
| Output Fall Time 15V | tTHL | 40 | 80 | ns | VDD=15 V, CL=50 pF, TA=25C | 4 | |
| Propagation Delay 5V | tPLH, tPHL | 160 | 300 | ns | All other 2,3,4 input gates, VDD=5.0 V, CL=50 pF, TA=25C | 4 | |
| Propagation Delay 10V | tPLH, tPHL | 65 | 130 | ns | All other 2,3,4 input gates, VDD=10 V, CL=50 pF, TA=25C | 4 | |
| Propagation Delay 15V | tPLH, tPHL | 50 | 100 | ns | All other 2,3,4 input gates, VDD=15 V, CL=50 pF, TA=25C | 4 | |
| Supply Voltage Range | VDD | 3 | 18 | Vdc | Features | 1 | |
| DC Supply Voltage Range | VDD | -0.5 | 18 | V | Referenced to VSS | 1 | |
| Input or Output Current per Pin | Iin, Iout | -10 | 10 | mA | DC or transient, per pin | 1 | |
| Power Dissipation per Package | PD | 500 | mW | Note 1; derate -7.0 mW/C from 65C to 125C | 1 | ||
| Ambient Temperature Range | TA | -55 | 125 | °C | 1 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 1 | ||
| Lead Temperature | TL | 260 | °C | 8-second soldering | 1 | ||
| ESD Withstand Voltage HBM | VESD | 3000 | V | Human Body Model, > 3000 | 1 | ||
| ESD Withstand Voltage MM | VESD | 300 | V | Machine Model, > 300 | 1 |
CAD (KiCad official)
- Symbol:
MC14081BDG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc14081bdg-etched.step/mc14081bdg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc14081bdg.step/mc14081bdg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (13 pp, sha256
eb3b534bdf6b15cd, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MC14081BDG
**onsemi** · Gates · SOIC-14
MC14081BDG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN 1A | input | Gate A input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 2 | IN 2A | input | Gate A input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 3 | OUTA | output | Buffered output of gate A; unused outputs must be left open, max ±10 mA per pin. |
| 4 | OUTB | output | Buffered output of gate B; unused outputs must be left open, max ±10 mA per pin. |
| 5 | IN 1B | input | Gate B input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 6 | IN 2B | input | Gate B input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 7 | VSS | power_in | Negative supply / ground reference for all voltages (VSS = pin 7 for all devices). |
| 8 | IN 1C | input | Gate C input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 9 | IN 2C | input | Gate C input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 10 | OUTC | output | Buffered output of gate C; unused outputs must be left open, max ±10 mA per pin. |
| 11 | OUTD | output | Buffered output of gate D; unused outputs must be left open, max ±10 mA per pin. |
| 12 | IN 1D | input | Gate D input 1 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 13 | IN 2D | input | Gate D input 2 of the 2-input AND gate; unused inputs of AND gates must be tied to VDD. |
| 14 | VDD | power_in | Positive supply, 3.0 Vdc to 18 Vdc (absolute max −0.5 to +18.0 V); VDD = pin 14 for all devices. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage 0 Level -55C | VOL | | | 0.05 | Vdc | Vin = VDD or 0, VDD=5/10/15 V, TA=-55C | 3 |
| Output Voltage 0 Level 25C | VOL | | 0 | 0.05 | Vdc | Vin = VDD or 0, VDD=5/10/15 V, TA=25C | 3 |
| Output Voltage 0 Level 125C | VOL | | | 0.05 | Vdc | Vin = VDD or 0, VDD=5/10/15 V, TA=125C | 3 |
| Output Voltage 1 Level 5V -55C | VOH | 4.95 | | | Vdc | Vin = 0 or VDD, VDD=5.0 V, TA=-55C | 3 |
| Output Voltage 1 Level 5V 25C | VOH | 4.95 | 5 | | Vdc | Vin = 0 or VDD, VDD=5.0 V, TA=25C | 3 |
| Output Voltage 1 Level 5V 125C | VOH | 4.95 | | | Vdc | Vin = 0 or VDD, VDD=5.0 V, TA=125C | 3 |
| Output Voltage 1 Level 10V | VOH | 9.95 | 10 | | Vdc | Vin = 0 or VDD, VDD=10 V, all temperatures | 3 |
| Output Voltage 1 Level 15V | VOH | 14.95 | 15 | | Vdc | Vin = 0 or VDD, VDD=15 V, all temperatures | 3 |
| Input Voltage 0 Level 5V | VIL | | 2.25 | 1.5 | Vdc | VO = 4.5 or 0.5 Vdc, VDD=5.0 V | 3 |
| Input Voltage 0 Level 10V | VIL | | 4.5 | 3 | Vdc | VO = 9.0 or 1.0 Vdc, VDD=10 V | 3 |
| Input Voltage 0 Level 15V | VIL | | 6.75 | 4 | Vdc | VO = 13.5 or 1.5 Vdc, VDD=15 V | 3 |
| Input Voltage 1 Level 5V | VIH | 3.5 | 2.75 | | Vdc | VO = 0.5 or 4.5 Vdc, VDD=5.0 V | 3 |
| Input Voltage 1 Level 10V | VIH | 7 | 5.5 | | Vdc | VO = 1.0 or 9.0 Vdc, VDD=10 V | 3 |
| Input Voltage 1 Level 15V | VIH | 11 | 8.25 | | Vdc | VO = 1.5 or 13.5 Vdc, VDD=15 V | 3 |
| Source current 5V VOH 2.5V | IOH | -3 | -4.2 | | mAdc | VOH = 2.5 Vdc, VDD=5.0 V, TA=-55C (min); 25C min -2.4; 125C min -1.7 | 3 |
| Source current 5V VOH 4.6V | IOH | -0.64 | -0.88 | | mAdc | VOH = 4.6 Vdc, VDD=5.0 V, TA=-55C (min); 25C min -0.51; 125C min -0.36 | 3 |
| Source current 10V | IOH | -1.6 | -2.25 | | mAdc | VOH = 9.5 Vdc, VDD=10 V, TA=-55C (min); 25C min -1.3; 125C min -0.9 | 3 |
| Source current 15V | IOH | -4.2 | -8.8 | | mAdc | VOH = 13.5 Vdc, VDD=15 V, TA=-55C (min); 25C min -3.4; 125C min -2.4 | 3 |
| Sink current 5V | IOL | 0.64 | 0.88 | | mAdc | VOL = 0.4 Vdc, VDD=5.0 V, TA=-55C (min); 25C min 0.51; 125C min 0.36 | 3 |
| Sink current 10V | IOL | 1.6 | 2.25 | | mAdc | VOL = 0.5 Vdc, VDD=10 V, TA=-55C (min); 25C min 1.3; 125C min 0.9 | 3 |
| Sink current 15V | IOL | 4.2 | 8.8 | | mAdc | VOL = 1.5 Vdc, VDD=15 V, TA=-55C (min); 25C min 3.4; 125C min 2.4 | 3 |
| Input Current -55C | Iin | -0.1 | | 0.1 | Adc | VDD=15 V, TA=-55C | 3 |
| Input Current 25C | Iin | -0.1 | 1e-05 | 0.1 | Adc | VDD=15 V, TA=25C (typ ±0.00001) | 3 |
| Input Current 125C | Iin | -1 | | 1 | Adc | VDD=15 V, TA=125C | 3 |
| Input Capacitance | Cin | | 5 | 7.5 | pF | Vin = 0, TA=25C | 3 |
| Quiescent Current 5V 25C | IDD | | 0.0005 | 0.25 | Adc | VDD=5.0 V, per package, TA=-55C and 25C max 0.25 | 3 |
| Quiescent Current 10V 25C | IDD | | 0.001 | 0.5 | Adc | VDD=10 V, per package, TA=-55C and 25C max 0.5 | 3 |
| Quiescent Current 15V 25C | IDD | | 0.0015 | 1 | Adc | VDD=15 V, per package, TA=-55C and 25C max 1.0 | 3 |
| Quiescent Current 5V 125C | IDD | | | 7.5 | Adc | VDD=5.0 V, TA=125C | 3 |
| Quiescent Current 10V 125C | IDD | | | 15 | Adc | VDD=10 V, TA=125C | 3 |
| Quiescent Current 15V 125C | IDD | | | 30 | Adc | VDD=15 V, TA=125C | 3 |
| Output Rise Time 5V | tTLH | | 100 | 200 | ns | VDD=5.0 V, CL=50 pF, TA=25C | 4 |
| Output Rise Time 10V | tTLH | | 50 | 100 | ns | VDD=10 V, CL=50 pF, TA=25C | 4 |
| Output Rise Time 15V | tTLH | | 40 | 80 | ns | VDD=15 V, CL=50 pF, TA=25C | 4 |
| Output Fall Time 5V | tTHL | | 100 | 200 | ns | VDD=5.0 V, CL=50 pF, TA=25C | 4 |
| Output Fall Time 10V | tTHL | | 50 | 100 | ns | VDD=10 V, CL=50 pF, TA=25C | 4 |
| Output Fall Time 15V | tTHL | | 40 | 80 | ns | VDD=15 V, CL=50 pF, TA=25C | 4 |
| Propagation Delay 5V | tPLH, tPHL | | 160 | 300 | ns | All other 2,3,4 input gates, VDD=5.0 V, CL=50 pF, TA=25C | 4 |
| Propagation Delay 10V | tPLH, tPHL | | 65 | 130 | ns | All other 2,3,4 input gates, VDD=10 V, CL=50 pF, TA=25C | 4 |
| Propagation Delay 15V | tPLH, tPHL | | 50 | 100 | ns | All other 2,3,4 input gates, VDD=15 V, CL=50 pF, TA=25C | 4 |
| Supply Voltage Range | VDD | 3 | | 18 | Vdc | Features | 1 |
| DC Supply Voltage Range | VDD | -0.5 | | 18 | V | Referenced to VSS | 1 |
| Input or Output Current per Pin | Iin, Iout | -10 | | 10 | mA | DC or transient, per pin | 1 |
| Power Dissipation per Package | PD | | | 500 | mW | Note 1; derate -7.0 mW/C from 65C to 125C | 1 |
| Ambient Temperature Range | TA | -55 | | 125 | °C | | 1 |
| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 1 |
| Lead Temperature | TL | | | 260 | °C | 8-second soldering | 1 |
| ESD Withstand Voltage HBM | VESD | 3000 | | | V | Human Body Model, > 3000 | 1 |
| ESD Withstand Voltage MM | VESD | 300 | | | V | Machine Model, > 300 | 1 |
## CAD (KiCad official)
- Symbol: `MC14081BDG`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `mc14081bdg-etched.step` / `mc14081bdg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc14081bdg.step` / `mc14081bdg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc14081b-d.pdf) (13 pp, sha256 `eb3b534bdf6b15cd`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mc14081bdg-datasheet.pdf)