component
MC14071BDG
Public Made by Adomby adom
onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| docs | 8d ago |
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| mc14071bdg-etched.step | 8d ago |
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MC14071BDG
onsemi · Gates · SOIC-14
MC14071BDG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN 1A | input | Input 1 of gate A (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 2 | IN 2A | input | Input 2 of gate A (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 3 | OUTA | output | Buffered output of gate A; maximum output current is 10 mA per pin. |
| 4 | OUTB | output | Buffered output of gate B; maximum output current is 10 mA per pin. |
| 5 | IN 1B | input | Input 1 of gate B (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 6 | IN 2B | input | Input 2 of gate B (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 7 | VSS | power_in | Negative supply and reference (0 V) for all voltages; the device supply range is 3.0 Vdc to 18 Vdc above VSS. |
| 8 | IN 1C | input | Input 1 of gate C (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 9 | IN 2C | input | Input 2 of gate C (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 10 | OUTC | output | Buffered output of gate C; maximum output current is 10 mA per pin. |
| 11 | OUTD | output | Buffered output of gate D; maximum output current is 10 mA per pin. |
| 12 | IN 1D | input | Input 1 of gate D (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 13 | IN 2D | input | Input 2 of gate D (quad 2-input OR); inputs must be held between VSS and VDD, and unused OR inputs must be tied to VSS. |
| 14 | VDD | power_in | Positive supply; 3.0 Vdc to 18 Vdc relative to VSS, with absolute maximum DC supply of -0.5 V to +18.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage Range | VDD | -0.5 | 18 | V | Voltages referenced to VSS | 1 | |
| Input or Output Current per Pin | Iin, Iout | -10 | 10 | mA | DC or transient, per pin | 1 | |
| Power Dissipation per Package | PD | 500 | mW | Note 1: D/DW packages derate -7.0 mW/C from 65C to 125C | 1 | ||
| Ambient Temperature Range | TA | -55 | 125 | °C | 1 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 1 | ||
| Lead Temperature | TL | 260 | °C | 8-second soldering | 1 | ||
| Supply Voltage Range | VDD | 3 | 18 | V | Features list: 3.0 Vdc to 18 Vdc | 1 | |
| Output Voltage 0 Level | VOL | 0 | 0.05 | Vdc | VDD=5.0 V, Vin = VDD or 0, 25C | 3 | |
| Output Voltage 1 Level | VOH | 4.95 | 5 | Vdc | VDD=5.0 V, Vin = 0 or VDD, 25C | 3 | |
| Output Voltage 1 Level | VOH | 9.95 | 10 | Vdc | VDD=10 V, Vin = 0 or VDD, 25C | 3 | |
| Output Voltage 1 Level | VOH | 14.95 | 15 | Vdc | VDD=15 V, Vin = 0 or VDD, 25C | 3 | |
| Input Voltage 0 Level | VIL | 2.25 | 1.5 | Vdc | VDD=5.0 V, VO = 4.5 or 0.5 Vdc, 25C | 3 | |
| Input Voltage 0 Level | VIL | 4.5 | 3 | Vdc | VDD=10 V, VO = 9.0 or 1.0 Vdc, 25C | 3 | |
| Input Voltage 0 Level | VIL | 6.75 | 4 | Vdc | VDD=15 V, VO = 13.5 or 1.5 Vdc, 25C | 3 | |
| Input Voltage 1 Level | VIH | 3.5 | 2.75 | Vdc | VDD=5.0 V, VO = 0.5 or 4.5 Vdc, 25C | 3 | |
| Input Voltage 1 Level | VIH | 7 | 5.5 | Vdc | VDD=10 V, VO = 1.0 or 9.0 Vdc, 25C | 3 | |
| Input Voltage 1 Level | VIH | 11 | 8.25 | Vdc | VDD=15 V, VO = 1.5 or 13.5 Vdc, 25C | 3 | |
| Output Drive Current Source | IOH | -2.4 | -4.2 | mAdc | VDD=5.0 V, VOH = 2.5 Vdc, 25C | 3 | |
| Output Drive Current Source | IOH | -0.51 | -0.88 | mAdc | VDD=5.0 V, VOH = 4.6 Vdc, 25C | 3 | |
| Output Drive Current Source | IOH | -1.3 | -2.25 | mAdc | VDD=10 V, VOH = 9.5 Vdc, 25C | 3 | |
| Output Drive Current Source | IOH | -3.4 | -8.8 | mAdc | VDD=15 V, VOH = 13.5 Vdc, 25C | 3 | |
| Output Drive Current Sink | IOL | 0.51 | 0.88 | mAdc | VDD=5.0 V, VOL = 0.4 Vdc, 25C | 3 | |
| Output Drive Current Sink | IOL | 1.3 | 2.25 | mAdc | VDD=10 V, VOL = 0.5 Vdc, 25C | 3 | |
| Output Drive Current Sink | IOL | 3.4 | 8.8 | mAdc | VDD=15 V, VOL = 1.5 Vdc, 25C | 3 | |
| Input Current | Iin | -0.1 | 1e-05 | 0.1 | µAdc | VDD=15 V, 25C; printed ±0.1 max, ±0.00001 typ | 3 |
| Input Current | Iin | -0.1 | 0.1 | µAdc | VDD=15 V, -55C | 3 | |
| Input Current | Iin | -1 | 1 | µAdc | VDD=15 V, 125C | 3 | |
| Input Capacitance | Cin | 5 | 7.5 | pF | Vin = 0, 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 0.0005 | 0.25 | µAdc | VDD=5.0 V, 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 0.001 | 0.5 | µAdc | VDD=10 V, 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 0.0015 | 1 | µAdc | VDD=15 V, 25C | 3 | |
| Quiescent Current (Per Package) | IDD | 0.25 | µAdc | VDD=5.0 V, -55C | 3 | ||
| Quiescent Current (Per Package) | IDD | 0.5 | µAdc | VDD=10 V, -55C | 3 | ||
| Quiescent Current (Per Package) | IDD | 1 | µAdc | VDD=15 V, -55C | 3 | ||
| Quiescent Current (Per Package) | IDD | 7.5 | µAdc | VDD=5.0 V, 125C | 3 | ||
| Quiescent Current (Per Package) | IDD | 15 | µAdc | VDD=10 V, 125C | 3 | ||
| Quiescent Current (Per Package) | IDD | 30 | µAdc | VDD=15 V, 125C | 3 | ||
| Output Rise Time | tTLH | 100 | 200 | ns | VDD=5.0 V, CL = 50 pF, TA = 25C | 4 | |
| Output Rise Time | tTLH | 50 | 100 | ns | VDD=10 V, CL = 50 pF, TA = 25C | 4 | |
| Output Rise Time | tTLH | 40 | 80 | ns | VDD=15 V, CL = 50 pF, TA = 25C | 4 | |
| Output Fall Time | tTHL | 100 | 200 | ns | VDD=5.0 V, CL = 50 pF, TA = 25C | 4 | |
| Output Fall Time | tTHL | 50 | 100 | ns | VDD=10 V, CL = 50 pF, TA = 25C | 4 | |
| Output Fall Time | tTHL | 40 | 80 | ns | VDD=15 V, CL = 50 pF, TA = 25C | 4 | |
| Propagation Delay Time, all other 2, 3, and 4 input gates | tPLH, tPHL | 160 | 300 | ns | VDD=5.0 V, CL = 50 pF, TA = 25C | 4 | |
| Propagation Delay Time, all other 2, 3, and 4 input gates | tPLH, tPHL | 65 | 130 | ns | VDD=10 V, CL = 50 pF, TA = 25C | 4 | |
| Propagation Delay Time, all other 2, 3, and 4 input gates | tPLH, tPHL | 50 | 100 | ns | VDD=15 V, CL = 50 pF, TA = 25C | 4 |
CAD (KiCad official)
- Symbol:
MC14071BDG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mc14071bdg-etched.step/mc14071bdg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc14071bdg.step/mc14071bdg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (13 pp, sha256
eb3b534bdf6b15cd, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).