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MC14066BDR2

Public Made by Adom

by adom

onsemi Signal Switches, Multiplexers, Decoders, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MC14066BDR2

onsemi · Signal Switches, Multiplexers, Decoders · SOIC-14

MC14066BDR2 from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN 1 passive Analog switch 1 input/output terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
2 OUT 1 passive Analog switch 1 output/input terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
3 OUT 2 passive Analog switch 2 output/input terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
4 IN 2 passive Analog switch 2 input/output terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
5 CONTROL 2 input Digital control input for switch 2; logic 1 (VDD) turns the switch ON and logic 0 (VSS) turns it OFF, and it must not be left unconnected.
6 CONTROL 3 input Digital control input for switch 3; logic 1 (VDD) turns the switch ON and logic 0 (VSS) turns it OFF, and it must not be left unconnected.
7 VSS power_in Negative supply and logic-low reference (ground), with all voltages referenced to VSS; Vin and Vout must not go below VSS.
8 IN 3 passive Analog switch 3 input/output terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
9 OUT 3 passive Analog switch 3 output/input terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
10 OUT 4 passive Analog switch 4 output/input terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
11 IN 4 passive Analog switch 4 input/output terminal; signals must stay within VSS ≤ Vin/Vout ≤ VDD and switch through current is limited to ±25 mA.
12 CONTROL 4 input Digital control input for switch 4; logic 1 (VDD) turns the switch ON and logic 0 (VSS) turns it OFF, and it must not be left unconnected.
13 CONTROL 1 input Digital control input for switch 1; logic 1 (VDD) turns the switch ON and logic 0 (VSS) turns it OFF, and it must not be left unconnected.
14 VDD power_in Positive supply, 3.0 Vdc to 18 Vdc with respect to VSS (absolute maximum 18.0 V; most parameters are specified up to 15 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage Range VDD -0.5 18 V Voltages referenced to VSS 2
Input or Output Voltage Range (DC or Transient) Vin, Vout -0.5 V Max printed as VDD + 0.5 V 2
Input Current per Control Pin (DC or Transient) Iin -10 10 mA Per control pin 2
Switch Through Current ISW -25 25 mA 2
Power Dissipation per Package PD 500 mW Note 1 2
Ambient Temperature Range TA -55 125 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Power Supply Voltage Range VDD 3 18 V 4
Quiescent Current Per Package IDD 0.25 A VDD=5.0 V; TA=-55C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 0.005 0.25 A VDD=5.0 V; TA=25C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 7.5 A VDD=5.0 V; TA=125C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 0.5 A VDD=10 V; TA=-55C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 0.01 0.5 A VDD=10 V; TA=25C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 15 A VDD=10 V; TA=125C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 1 A VDD=15 V; TA=-55C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 0.015 1 A VDD=15 V; TA=25C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Quiescent Current Per Package IDD 30 A VDD=15 V; TA=125C; Vin=VSS or VDD; VSS<=VI/O<=VDD; Vswitch<=500 mV (Note 3) 4
Low-Level Input Voltage VIL 1.5 V VDD=5.0 V; Ron=per spec, Ioff=per spec 4
Low-Level Input Voltage VIL 3 V VDD=10 V; Ron=per spec, Ioff=per spec 4
Low-Level Input Voltage VIL 4 V VDD=15 V; Ron=per spec, Ioff=per spec 4
High-Level Input Voltage VIH 3.5 V VDD=5.0 V; Ron=per spec, Ioff=per spec 4
High-Level Input Voltage VIH 7 V VDD=10 V; Ron=per spec, Ioff=per spec 4
High-Level Input Voltage VIH 11 V VDD=15 V; Ron=per spec, Ioff=per spec 4
Input Leakage Current Iin -0.1 0.1 A VDD=15 V; Vin=0 or VDD; TA=-55C 4
Input Leakage Current Iin -0.1 1e-05 0.1 A VDD=15 V; Vin=0 or VDD; TA=25C 4
Input Leakage Current Iin -1 1 A VDD=15 V; Vin=0 or VDD; TA=125C 4
Input Capacitance Cin 5 7.5 pF 4
Recommended Static or Dynamic Voltage Across the Switch (Channel On) Vswitch 0 600 mV Channel On; TA=-55C; see Note 3 4
Recommended Static or Dynamic Voltage Across the Switch (Channel On) Vswitch 0 300 mV Channel On; TA=125C; see Note 3 4
ON Resistance Ron 800 OHMS VDD=5.0 V; TA=-55C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 250 1050 OHMS VDD=5.0 V; TA=25C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 1200 OHMS VDD=5.0 V; TA=125C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 400 OHMS VDD=10 V; TA=-55C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 120 500 OHMS VDD=10 V; TA=25C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 520 OHMS VDD=10 V; TA=125C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 220 OHMS VDD=15 V; TA=-55C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 80 280 OHMS VDD=15 V; TA=25C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Ron 300 OHMS VDD=15 V; TA=125C; Vswitch<=500 mV (Note 3); Vin=VIL or VIH (Control); Vin=0 to VDD (Switch) 4
ON Resistance Between Any Two Channels in the Same Package Ron 70 OHMS VDD=5.0 V; TA=-55C 4
ON Resistance Between Any Two Channels in the Same Package Ron 25 70 OHMS VDD=5.0 V; TA=25C 4
ON Resistance Between Any Two Channels in the Same Package Ron 135 OHMS VDD=5.0 V; TA=125C 4
ON Resistance Between Any Two Channels in the Same Package Ron 50 OHMS VDD=10 V; TA=-55C 4
ON Resistance Between Any Two Channels in the Same Package Ron 10 50 OHMS VDD=10 V; TA=25C 4
ON Resistance Between Any Two Channels in the Same Package Ron 95 OHMS VDD=10 V; TA=125C 4
ON Resistance Between Any Two Channels in the Same Package Ron 45 OHMS VDD=15 V; TA=-55C 4
ON Resistance Between Any Two Channels in the Same Package Ron 10 45 OHMS VDD=15 V; TA=25C 4
ON Resistance Between Any Two Channels in the Same Package Ron 65 OHMS VDD=15 V; TA=125C 4
Off-Channel Leakage Current Ioff -100 100 nA VDD=15 V; TA=-55C; Vin=VIL or VIH (Control); channel to channel or any one channel (Figure 6) 4
Off-Channel Leakage Current Ioff -100 0.05 100 nA VDD=15 V; TA=25C; Vin=VIL or VIH (Control); channel to channel or any one channel (Figure 6) 4
Off-Channel Leakage Current Ioff -1000 1000 nA VDD=15 V; TA=125C; Vin=VIL or VIH (Control); channel to channel or any one channel (Figure 6) 4
Propagation Delay Time, Input to Output tPLH, tPHL 20 40 ns VDD=5.0 V; VSS=0 Vdc; Input to Output, RL=10 k; CL=50 pF; TA=25C 5
Propagation Delay Time, Input to Output tPLH, tPHL 10 20 ns VDD=10 V; VSS=0 Vdc; Input to Output, RL=10 k; CL=50 pF; TA=25C 5
Propagation Delay Time, Input to Output tPLH, tPHL 7 15 ns VDD=15 V; VSS=0 Vdc; Input to Output, RL=10 k; CL=50 pF; TA=25C 5
Output 1 to High Impedance / Output 0 to High Impedance tPHZ, tPLZ 40 80 ns VDD=5.0 V; Control to Output, RL=1 k, CL=50 pF, TA=25C (Figure 2) 5
Output 1 to High Impedance / Output 0 to High Impedance tPHZ, tPLZ 35 70 ns VDD=10 V; Control to Output, RL=1 k, CL=50 pF, TA=25C (Figure 2) 5
Output 1 to High Impedance / Output 0 to High Impedance tPHZ, tPLZ 30 60 ns VDD=15 V; Control to Output, RL=1 k, CL=50 pF, TA=25C (Figure 2) 5
High Impedance to Output 1 / High Impedance to Output 0 tPZH, tPZL 60 120 ns VDD=5.0 V; Control to Output, RL=1 k, CL=50 pF, TA=25C (Figure 2) 5
High Impedance to Output 1 / High Impedance to Output 0 tPZH, tPZL 20 40 ns VDD=10 V; Control to Output, RL=1 k, CL=50 pF, TA=25C (Figure 2) 5
High Impedance to Output 1 / High Impedance to Output 0 tPZH, tPZL 15 30 ns VDD=15 V; Control to Output, RL=1 k, CL=50 pF, TA=25C (Figure 2) 5

CAD (KiCad official)

  • Symbol: MC14066BDR2
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc14066bdr2-etched.step / mc14066bdr2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc14066bdr2.step / mc14066bdr2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 4cf860e081c424ee, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF