MC14049BDR2G

{
  "schema_version": 1,
  "type": "component",
  "slug": "mc14049bdr2g",
  "title": "MC14049BDR2G",
  "brief": "onsemi Inverters, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "logic",
    "mc14049bdr2g"
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  "component": {
    "mpn": "MC14049BDR2G",
    "manufacturer": "onsemi",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Inverters",
    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc14049b-d.pdf",
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      "footprint": "mc14049bdr2g.kicad_mod",
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      "model_3d_plain": "mc14049bdr2g.glb",
      "model_3d_step": "mc14049bdr2g-etched.step",
      "model_3d_step_plain": "mc14049bdr2g.step",
      "lbr": "mc14049bdr2g.lbr"
    },
    "distributor_links": {
      "lcsc": "C7574"
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply rail. Operating range 3.0 V to 18 V referenced to VSS. All six inverters share this rail."
      },
      {
        "number": "2",
        "name": "OUTA",
        "type": "output",
        "description": "Inverter A output. CMOS push-pull; swings VSS to VDD. Sinks 3.2 mA at VOL=0.4 V with VDD=5 V (drives up to 2 TTL loads)."
      },
      {
        "number": "3",
        "name": "INA",
        "type": "input",
        "description": "Inverter A input. Vin may exceed VDD (up to +18 V absolute), enabling high-to-low level translation. VIH ≥ 3.5 V and VIL ≤ 1.5 V at VDD=5 V."
      },
      {
        "number": "4",
        "name": "OUTB",
        "type": "output",
        "description": "Inverter B output. CMOS push-pull; logical inversion of INB."
      },
      {
        "number": "5",
        "name": "INB",
        "type": "input",
        "description": "Inverter B input. Vin may exceed VDD for level shifting; high impedance CMOS gate input."
      },
      {
        "number": "6",
        "name": "OUTC",
        "type": "output",
        "description": "Inverter C output. CMOS push-pull; logical inversion of INC."
      },
      {
        "number": "7",
        "name": "INC",
        "type": "input",
        "description": "Inverter C input. Vin may exceed VDD for level shifting; high impedance CMOS gate input."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground / negative supply reference. All voltages in the datasheet are referenced to VSS."
      },
      {
        "number": "9",
        "name": "IND",
        "type": "input",
        "description": "Inverter D input. Vin may exceed VDD for level shifting; high impedance CMOS gate input."
      },
      {
        "number": "10",
        "name": "OUTD",
        "type": "output",
        "description": "Inverter D output. CMOS push-pull; logical inversion of IND."
      },
      {
        "number": "11",
        "name": "INE",
        "type": "input",
        "description": "Inverter E input. Vin may exceed VDD for level shifting; high impedance CMOS gate input."
      },
      {
        "number": "12",
        "name": "OUTE",
        "type": "output",
        "description": "Inverter E output. CMOS push-pull; logical inversion of INE."
      },
      {
        "number": "13",
        "name": "NC",
        "type": "unconnected",
        "description": "Not connected internally. Datasheet states pins 13 and 16 have no internal connection; leaving them floating or tying them to any level does not affect operation."
      },
      {
        "number": "14",
        "name": "INF",
        "type": "input",
        "description": "Inverter F input. Vin may exceed VDD for level shifting; high impedance CMOS gate input."
      },
      {
        "number": "15",
        "name": "OUTF",
        "type": "output",
        "description": "Inverter F output. CMOS push-pull; logical inversion of INF."
      },
      {
        "number": "16",
        "name": "NC",
        "type": "unconnected",
        "description": "Not connected internally. Datasheet explicitly notes pins 13 and 16 are not connected inside the die."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.onsemi.com/pdf/datasheet/mc14049b-d.pdf",
        "pages": 8,
        "sha256": "be5409591844c2e9",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "CD4049",
      "logic_family": "CD4000",
      "function_code": "4049",
      "function_class": "Buffer",
      "function_name": "Hex Inverting Buffer / Level Translator",
      "manufacturer": "Onsemi (Motorola legacy)",
      "is_specialty": false
    }
  },
  "metadata": {
    "specs": {
      "Manufacturer": "onsemi",
      "Package": "SOIC-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
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    "viewers",
    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
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  "discovery_pitch": "MC14049BDR2G (onsemi) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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    "path": "docs/hero.png"
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  "visibility": {
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  },
  "variants": [
    {
      "mpn": "MC14049BDR2GDG",
      "kind": "packaging"
    },
    {
      "mpn": "MC14049BDR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC14049BDR2GNLV...DR2G",
      "kind": "packaging"
    },
    {
      "mpn": "MC14049BDR2GFELG",
      "kind": "packaging"
    },
    {
      "mpn": "MC14049BDR2GDTG (14050B only)",
      "kind": "packaging"
    },
    {
      "mpn": "MC14049BDR2GDTR2G (14050B only)",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-28T18:42:00.793Z"
}