main
Ray pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) b7ccc1d 1mo ago
{
 "schema": "adom.pads/1",
 "slug": "mc14049bdr2g",
 "footprint": "SOIC-16_3.9x9.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -4.445
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"
 },
 "pad_count": 16,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "15",
  "16",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "VDD",
   "type": "power_in",
   "description": "Positive supply rail. Operating range 3.0 V to 18 V referenced to VSS. All six inverters share this rail.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "OUTA",
   "type": "output",
   "description": "Inverter A output. CMOS push-pull; swings VSS to VDD. Sinks 3.2 mA at VOL=0.4 V with VDD=5 V (drives up to 2 TTL loads).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "INA",
   "type": "input",
   "description": "Inverter A input. Vin may exceed VDD (up to +18 V absolute), enabling high-to-low level translation. VIH ≥ 3.5 V and VIL ≤ 1.5 V at VDD=5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "OUTB",
   "type": "output",
   "description": "Inverter B output. CMOS push-pull; logical inversion of INB.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "INB",
   "type": "input",
   "description": "Inverter B input. Vin may exceed VDD for level shifting; high impedance CMOS gate input.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "OUTC",
   "type": "output",
   "description": "Inverter C output. CMOS push-pull; logical inversion of INC.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "INC",
   "type": "input",
   "description": "Inverter C input. Vin may exceed VDD for level shifting; high impedance CMOS gate input.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "VSS",
   "type": "power_in",
   "description": "Ground / negative supply reference. All voltages in the datasheet are referenced to VSS.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "IND",
   "type": "input",
   "description": "Inverter D input. Vin may exceed VDD for level shifting; high impedance CMOS gate input.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "OUTD",
   "type": "output",
   "description": "Inverter D output. CMOS push-pull; logical inversion of IND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "INE",
   "type": "input",
   "description": "Inverter E input. Vin may exceed VDD for level shifting; high impedance CMOS gate input.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "OUTE",
   "type": "output",
   "description": "Inverter E output. CMOS push-pull; logical inversion of INE.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "NC",
   "type": "unconnected",
   "description": "Not connected internally. Datasheet states pins 13 and 16 have no internal connection; leaving them floating or tying them to any level does not affect operation.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "INF",
   "type": "input",
   "description": "Inverter F input. Vin may exceed VDD for level shifting; high impedance CMOS gate input.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "15",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "15",
   "name": "OUTF",
   "type": "output",
   "description": "Inverter F output. CMOS push-pull; logical inversion of INF.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "16",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "16",
   "name": "NC",
   "type": "unconnected",
   "description": "Not connected internally. Datasheet explicitly notes pins 13 and 16 are not connected inside the die.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}