MC14014BDR2G

@@ -8,22 +8,22 @@ MC14014BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted fr  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | P8 | input | Parallel data input 8 for synchronous (MC14014B) or asynchronous (MC14021B) parallel loading into the eighth stage. |-| 2 | Q7 | output | Serial output from the seventh stage (Q7 output available externally); the device can drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. |-| 3 | Q8 | output | Serial output from the eighth stage (Q8 output available externally); the device can drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. |-| 4 | P4 | input | Parallel data input 4 for loading the fourth register stage. |-| 5 | P3 | input | Parallel data input 3 for loading the third register stage. |-| 6 | P2 | input | Parallel data input 2 for loading the second register stage. |-| 7 | P1 | input | Parallel data input 1 for loading the first register stage. |-| 8 | VSS | power_in | Negative supply and reference ground; all voltages are referenced to VSS. |-| 9 | P/S | input | Parallel/serial control input that selects parallel input (high) or serial input (low) operation. |-| 10 | DS | input | Serial data input to the first register stage during serial operation. |-| 11 | C | input | Clock input; maximum clock frequency is 3.0 MHz at VDD = 5.0 V, 6.0 MHz at 10 V and 8.0 MHz at 15 V. |-| 12 | Q6 | output | Serial output from the sixth stage (Q6 output available externally); the device can drive two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. |-| 13 | P5 | input | Parallel data input 5 for loading the fifth register stage. |-| 14 | P6 | input | Parallel data input 6 for loading the sixth register stage. |-| 15 | P7 | input | Parallel data input 7 for loading the seventh register stage. |-| 16 | VDD | power_in | Positive supply; supply voltage range is 3.0 Vdc to 18 Vdc with absolute maximum of +18.0 V referenced to VSS. |+| 1 | P8 | input | Parallel data input to stage 8, loaded synchronously on the clock when P/S is high (MC14014B), CMOS input from −0.5 V to VDD + 0.5 V. |+| 2 | Q6 | output | Sixth-stage shift register output, sourcing −0.51 mA min at VOH = 4.6 V and sinking 0.51 mA min at VOL = 0.4 V with VDD = 5 V and 25 °C. |+| 3 | Q8 | output | Eighth-stage serial data output, propagation delay 400 ns typ / 800 ns max from clock at VDD = 5 V and CL = 50 pF. |+| 4 | P4 | input | Parallel data input to stage 4, loaded synchronously on the clock when P/S is high. |+| 5 | P3 | input | Parallel data input to stage 3, loaded synchronously on the clock when P/S is high. |+| 6 | P2 | input | Parallel data input to stage 2, loaded synchronously on the clock when P/S is high. |+| 7 | P1 | input | Parallel data input to stage 1, loaded synchronously on the clock when P/S is high. |+| 8 | VSS | power_in | Ground and negative supply reference; all voltages are referenced to VSS. |+| 9 | P/S | input | Parallel/serial mode control: high selects parallel load from P1–P8 and low selects serial shift from DS; minimum pulse width 400 ns at VDD = 5 V. |+| 10 | C | input | Clock input that shifts data on the rising edge, 1.5 MHz min / 3.0 MHz typ at VDD = 5 V, with clock rise time 15 µs max at 5 V. |+| 11 | DS | input | Serial data input into stage 1 when P/S is low; setup time to clock 350 ns min at VDD = 5 V. |+| 12 | Q7 | output | Seventh-stage shift register output, CMOS push-pull drive. |+| 13 | P5 | input | Parallel data input to stage 5, loaded synchronously on the clock when P/S is high. |+| 14 | P6 | input | Parallel data input to stage 6, loaded synchronously on the clock when P/S is high. |+| 15 | P7 | input | Parallel data input to stage 7, loaded synchronously on the clock when P/S is high. |+| 16 | VDD | power_in | Positive supply, 3.0 Vdc to 18 Vdc operating range with an absolute maximum of −0.5 V to +18.0 V. |  ## Key specifications 

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@@ -74,7 +74,7 @@     "footprint": "mc14014bdr2g.kicad_mod",     "footprint_sha256": "f9b5075740f7816c540ae1137f025d659beaec522ed7b86b1a5274cc9a2d8a25",     "pins": "page.json component.pins",-    "pins_sha256": "ecd6d97d89bf746fac86da382a6f6aa1ac7bf86cce8c74771e2f00bf6d32993b"+    "pins_sha256": "50ca993faf536eb365c163b25b9806d2d77966fa8544114c920abc7c9fc12f79"   },   "generator": "adom-wiki 1.8.11 (component_hero)",   "labels": [@@ -89,7 +89,7 @@     },     {       "pad": "2",-      "text": "Q7",+      "text": "Q6",       "x": -3.6,       "y": -3.175,       "align": "right",@@ -161,7 +161,7 @@     },     {       "pad": "10",-      "text": "DS",+      "text": "C",       "x": 3.6,       "y": 3.175,       "align": "left",@@ -170,7 +170,7 @@     },     {       "pad": "11",-      "text": "C",+      "text": "DS",       "x": 3.6,       "y": 1.905,       "align": "left",@@ -179,7 +179,7 @@     },     {       "pad": "12",-      "text": "Q6",+      "text": "Q7",       "x": 3.6,       "y": 0.635,       "align": "left",

@@ -13,7 +13,7 @@       (number "1" (effects (font (size 1.27 1.27))))     )     (pin output line (at -17.78 5.08 0) (length 5.08)-      (name "Q7" (effects (font (size 1.27 1.27))))+      (name "Q6" (effects (font (size 1.27 1.27))))       (number "2" (effects (font (size 1.27 1.27))))     )     (pin output line (at -17.78 2.54 0) (length 5.08)@@ -57,15 +57,15 @@       (number "13" (effects (font (size 1.27 1.27))))     )     (pin output line (at 17.78 -2.54 180) (length 5.08)-      (name "Q6" (effects (font (size 1.27 1.27))))+      (name "Q7" (effects (font (size 1.27 1.27))))       (number "12" (effects (font (size 1.27 1.27))))     )     (pin input line (at 17.78 -5.08 180) (length 5.08)-      (name "C" (effects (font (size 1.27 1.27))))+      (name "DS" (effects (font (size 1.27 1.27))))       (number "11" (effects (font (size 1.27 1.27))))     )     (pin input line (at 17.78 -7.62 180) (length 5.08)-      (name "DS" (effects (font (size 1.27 1.27))))+      (name "C" (effects (font (size 1.27 1.27))))       (number "10" (effects (font (size 1.27 1.27))))     )     (pin input line (at 17.78 -10.16 180) (length 5.08)

@@ -1,6 +1,6 @@ {   "slug": "mc14014bdr2g",-  "version": "0.1.0",+  "version": "0.1.1",   "type": "component",   "description": "onsemi Shifting Register, SOIC-16. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.",   "tags": [

@@ -4,7 +4,7 @@   "slug": "mc14014bdr2g",   "title": "MC14014BDR2G",   "brief": "onsemi Shifting Register, SOIC-16. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.1.1",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -942,7 +942,7 @@     "mc14014bdr2g-hero.overlay.json",     "mc14014bdr2g-etched.glb"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "onsemi Shifting Register, SOIC-16. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.",+  "org": "adom" }\ No newline at end of file