MC14001BDR2G

@@ -0,0 +1,56 @@+# MC14001BDR2G++**onsemi** · Gates · SOIC-14++MC14001BDR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN1A | input | Gate A input 1. CMOS logic input to NOR gate A; high impedance, VIH >= 3.5 V at VDD = 5 V; unused inputs of NOR gates must be tied to VSS. |+| 2 | IN2A | input | Gate A input 2. CMOS logic input to NOR gate A; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 3 | OUTA | output | Gate A output. Buffered CMOS output equal to NOR(IN1A, IN2A). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V. |+| 4 | OUTB | output | Gate B output. Buffered CMOS output equal to NOR(IN1B, IN2B). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V. |+| 5 | IN1B | input | Gate B input 1. CMOS logic input to NOR gate B; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 6 | IN2B | input | Gate B input 2. CMOS logic input to NOR gate B; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 7 | VSS | power_in | Negative supply / ground reference. All voltages referenced to VSS; typically 0 V. |+| 8 | IN1C | input | Gate C input 1. CMOS logic input to NOR gate C; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 9 | IN2C | input | Gate C input 2. CMOS logic input to NOR gate C; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 10 | OUTC | output | Gate C output. Buffered CMOS output equal to NOR(IN1C, IN2C). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V. |+| 11 | OUTD | output | Gate D output. Buffered CMOS output equal to NOR(IN1D, IN2D). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V. |+| 12 | IN1D | input | Gate D input 1. CMOS logic input to NOR gate D; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 13 | IN2D | input | Gate D input 2. CMOS logic input to NOR gate D; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS. |+| 14 | VDD | power_in | Positive supply. Operating range 3.0 V to 18 V (absolute max -0.5 V to +18 V). Quiescent current IDD ~ 0.5 uA typ per package at VDD = 10 V, 25 C. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `MC14001BDR2GDR2G`+- `MC14001BDR2GDG`+- `MC14001BDR2GDTR2G`+- `MC14001BDR2GDTG`++## CAD (KiCad official)++- Symbol: `MC14001BDR2G`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc14001b-d.pdf) (13 pp, sha256 `eb3b534bdf6b15cd`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc14001bdr2g-datasheet.pdf)

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