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mc14001bdr2g: factory component page (tier=mfr)

Ray ·51782dbe0e ·2mo ago ·parent 93ad4f4
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "mc14001bdr2g",+  "title": "MC14001BDR2G",+  "brief": "onsemi Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "onsemi Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "mc14001bdr2g"   ],+  "component": {+    "mpn": "MC14001BDR2G",+    "manufacturer": "onsemi",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc14001b-d.pdf",+    "parts": {+      "symbol": "mc14001bdr2g.kicad_sym",+      "footprint": "mc14001bdr2g.kicad_mod",+      "model_3d": "mc14001bdr2g.glb",+      "model_3d_step": "mc14001bdr2g.step",+      "lbr": "mc14001bdr2g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "IN1A",+        "type": "input",+        "description": "Gate A input 1. CMOS logic input to NOR gate A; high impedance, VIH >= 3.5 V at VDD = 5 V; unused inputs of NOR gates must be tied to VSS."+      },+      {+        "number": "2",+        "name": "IN2A",+        "type": "input",+        "description": "Gate A input 2. CMOS logic input to NOR gate A; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "3",+        "name": "OUTA",+        "type": "output",+        "description": "Gate A output. Buffered CMOS output equal to NOR(IN1A, IN2A). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V."+      },+      {+        "number": "4",+        "name": "OUTB",+        "type": "output",+        "description": "Gate B output. Buffered CMOS output equal to NOR(IN1B, IN2B). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V."+      },+      {+        "number": "5",+        "name": "IN1B",+        "type": "input",+        "description": "Gate B input 1. CMOS logic input to NOR gate B; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "6",+        "name": "IN2B",+        "type": "input",+        "description": "Gate B input 2. CMOS logic input to NOR gate B; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground reference. All voltages referenced to VSS; typically 0 V."+      },+      {+        "number": "8",+        "name": "IN1C",+        "type": "input",+        "description": "Gate C input 1. CMOS logic input to NOR gate C; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "9",+        "name": "IN2C",+        "type": "input",+        "description": "Gate C input 2. CMOS logic input to NOR gate C; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "10",+        "name": "OUTC",+        "type": "output",+        "description": "Gate C output. Buffered CMOS output equal to NOR(IN1C, IN2C). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V."+      },+      {+        "number": "11",+        "name": "OUTD",+        "type": "output",+        "description": "Gate D output. Buffered CMOS output equal to NOR(IN1D, IN2D). Drives two LSTTL loads; IOH ~ -0.88 mA typ at VOH = 4.6 V, VDD = 5 V."+      },+      {+        "number": "12",+        "name": "IN1D",+        "type": "input",+        "description": "Gate D input 1. CMOS logic input to NOR gate D; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "13",+        "name": "IN2D",+        "type": "input",+        "description": "Gate D input 2. CMOS logic input to NOR gate D; high impedance, VIH >= 3.5 V at VDD = 5 V; unused NOR-gate inputs must be tied to VSS."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply. Operating range 3.0 V to 18 V (absolute max -0.5 V to +18 V). Quiescent current IDD ~ 0.5 uA typ per package at VDD = 10 V, 25 C."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.onsemi.com/pdf/datasheet/mc14001b-d.pdf",+        "pages": 13,+        "sha256": "eb3b534bdf6b15cd",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "onsemi",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "mc14001bdr2g"+  ],+  "discovery_pitch": "MC14001BDR2G (onsemi) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/mc14001bdr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file