component

MC100EL31DG

Public Made by Adom

by adom

onsemi Flip Flops, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsmc100el31dgfactory-2.0.0extractor-text

Verified MC100EL31DG

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MC100EL31DG · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 8-page datasheet
  • ✓distributor: lcsc C897701, digikey 2156-MC100EL31DG-OS-ND, mouser 863-MC100EL31DG
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-b8vvwsvl/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.6)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mc100el31dg.kicad_sym✓ mc100el31dg.kicad_mod✓ mc100el31dg.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 16h ago
viewers mc100el31dg: viewers · Ray 16h ago
mc100el31dg-etched.glb Publish 0.1.0 · Ray 16h ago
mc100el31dg-etched.step mc100el31dg: factory component page (tier=mfr) · Ray 16h ago
mc100el31dg-hero.glb mc100el31dg: hero GLB from the etched model (keeps the MPN mark) · Ray 16h ago
mc100el31dg-hero.overlay.json Publish 0.1.0 · Ray 16h ago
mc100el31dg.glb Publish 0.1.0 · Ray 16h ago
mc100el31dg.kicad_mod Publish 0.1.0 · Ray 16h ago
mc100el31dg.kicad_sym Publish 0.1.0 · Ray 16h ago
mc100el31dg.lbr Publish 0.1.0 · Ray 16h ago
mc100el31dg.step Publish 0.1.0 · Ray 16h ago
package.json Publish 0.1.0 · Ray 16h ago
page.json Set visibility: public · Ray 16h ago
README.md Publish 0.1.0 · Ray 16h ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 16h ago

MC100EL31DG

onsemi · Flip Flops · SOIC-8

MC100EL31DG from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S input ECL asynchronous set input, level triggered, with internal pulldown resistor so it defaults low when left open.
2 D input ECL data input with internal pulldown resistor; data enters the master when CLK is LOW.
3 CLK input ECL clock input with internal pulldown resistor; data is transferred to the outputs on the LOW-to-HIGH transition.
4 R input ECL asynchronous reset input, level triggered, with internal pulldown resistor so it defaults low when left open.
5 VEE power_in Negative supply, 0 V in PECL mode or -4.2 V to -5.7 V in NECL mode (absolute maximum -8 V).
6 Q̄ output Complementary ECL data output.
7 Q output True ECL data output.
8 VCC power_in Positive supply, 4.2 V to 5.7 V in PECL mode or 0 V in NECL mode (absolute maximum 8 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Logic ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
PECL Mode Power Supply VCC 8 V VEE = 0 V 2
NECL Mode Power Supply VEE -8 V VCC = 0 V 2
PECL Mode Input Voltage VI 6 V VEE = 0 V; VI ≤ VCC 2
NECL Mode Input Voltage VI -6 V VCC = 0 V; VI ≥ VEE 2
Output Current, Continuous Iout 50 mA Continuous 2
Output Current, Surge Iout 100 mA Surge 2
Operating Temperature Range TA -40 85 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Thermal Resistance, Junction-to-Ambient θJA 190 °C/W 0 lfpm; SOIC−8 NB 2
Thermal Resistance, Junction-to-Ambient θJA 130 °C/W 500 lfpm; SOIC−8 NB 2
Thermal Resistance, Junction-to-Case θJC 41 44 °C/W Standard board; SOIC−8 NB 2
Wave Solder (Pb-Free) Tsol 265 °C < 2 to 3 sec @ 260°C 2
PECL Mode Operating Range VCC 4.2 5.7 V VEE = 0 V 1
NECL Mode Operating Range VEE -5.7 -4.2 V VCC = 0 V 1
PECL Power Supply Current, 100EL IEE 27 32 mA VCC = 5.0 V; VEE = 0 V; −40°C 3
PECL Power Supply Current, 100EL IEE 31 37 mA VCC = 5.0 V; VEE = 0 V; 85°C 3
PECL Output HIGH Voltage VOH 3915 3995 4120 mV VCC = 5.0 V; VEE = 0 V; −40°C; 50 Ω to VCC−2 V 3
PECL Output HIGH Voltage VOH 3975 4045 4120 mV VCC = 5.0 V; VEE = 0 V; 25°C; 50 Ω to VCC−2 V 3
PECL Output HIGH Voltage VOH 3975 4050 4120 mV VCC = 5.0 V; VEE = 0 V; 85°C; 50 Ω to VCC−2 V 3
PECL Output LOW Voltage VOL 3170 3305 3445 mV VCC = 5.0 V; VEE = 0 V; −40°C; 50 Ω to VCC−2 V 3
PECL Output LOW Voltage VOL 3190 3295 3380 mV VCC = 5.0 V; VEE = 0 V; 25°C; 50 Ω to VCC−2 V 3
PECL Input HIGH Voltage VIH 3835 4120 mV VCC = 5.0 V; VEE = 0 V; −40°C 3
PECL Input LOW Voltage VIL 3190 3525 mV VCC = 5.0 V; VEE = 0 V; −40°C 3
PECL Input HIGH Current IIH 150 µA VCC = 5.0 V; VEE = 0 V; 25°C 3
PECL Input LOW Current IIL 0.5 µA VCC = 5.0 V; VEE = 0 V; 25°C 3
NECL Power Supply Current, 100EL IEE 27 32 mA VCC = 0 V; VEE = −5.0 V; −40°C 4
NECL Power Supply Current, 100EL IEE 31 37 mA VCC = 0 V; VEE = −5.0 V; 85°C 4
NECL Output HIGH Voltage VOH -1085 -1005 -880 mV VCC = 0 V; VEE = −5.0 V; −40°C; 50 Ω to VCC−2 V 4
NECL Output HIGH Voltage VOH -1025 -955 -880 mV VCC = 0 V; VEE = −5.0 V; 25°C; 50 Ω to VCC−2 V 4
NECL Output LOW Voltage VOL -1830 -1695 -1555 mV VCC = 0 V; VEE = −5.0 V; −40°C; 50 Ω to VCC−2 V 4
NECL Output LOW Voltage VOL -1810 -1705 -1620 mV VCC = 0 V; VEE = −5.0 V; 25°C; 50 Ω to VCC−2 V 4
NECL Input HIGH Voltage VIH -1165 -880 mV VCC = 0 V; VEE = −5.0 V; −40°C 4
NECL Input LOW Voltage VIL -1810 -1475 mV VCC = 0 V; VEE = −5.0 V; −40°C 4
NECL Input HIGH Current IIH 150 µA VCC = 0 V; VEE = −5.0 V; 25°C 4
NECL Input LOW Current IIL 0.5 µA VCC = 0 V; VEE = −5.0 V; 25°C 4
Maximum Toggle Frequency fmax 2.2 2.8 GHz 25°C 4
Propagation Delay to Output, Low-to-High tPLH 315 465 630 ps From CLK, S, R; −40°C 4
Propagation Delay to Output, Low-to-High tPLH 375 475 590 ps From CLK, S, R; 25°C 4
Propagation Delay to Output, Low-to-High tPLH 430 530 645 ps From CLK, S, R; 85°C 4
Propagation Delay to Output, High-to-Low tPHL 295 455 630 ps From CLK, S, R; −40°C 4
Propagation Delay to Output, High-to-Low tPHL 355 465 590 ps From CLK, S, R; 25°C 4
Propagation Delay to Output, High-to-Low tPHL 400 510 645 ps From CLK, S, R; 85°C 4
Setup Time tS 150 250 ps 25°C 4
Hold Time tH 0 100 ps 25°C 4
Minimum Pulse Width (CLK, Set, Reset) tPW 400 ps 25°C 4
Output Rise/Fall Time Q (20%−80%) tr/tf 100 225 350 ps 20%−80%; 25°C 4

CAD (KiCad official)

  • Symbol: MC100EL31DG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: mc100el31dg-etched.step / mc100el31dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc100el31dg.step / mc100el31dg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 ffdf3c513c514bba, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF