component
MB85RS16NPNF-G-JNERE1
Public Made by Adomby adom
FUJITSU FRAM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownMB85RS16NPNF-G-JNERE1
FUJITSU · FRAM · SOIC-8
MB85RS16NPNF-G-JNERE1 from FUJITSU, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select input pin, active low; when CS is high level device is in deselect standby status with SO in high-Z, when CS is low device is in select active status and pulled up internally to VDD. |
| 2 | SO | output | Serial Data Output pin; outputs reading data from FRAM memory cell array and status register synchronously to falling edge of SCK, high-Z during standby. |
| 3 | WP | input | Write Protect input pin; controls writing to status register in relation with WPEN bit. |
| 4 | GND | power_in | Ground reference pin. |
| 5 | SI | input | Serial Data Input pin; receives op-code, address, and writing data synchronously to rising edge of SCK. |
| 6 | SCK | input | Serial Clock input pin; SI is loaded synchronously to rising edge, SO is output synchronously to falling edge. |
| 7 | HOLD | input | Hold input pin, active low; when held low interrupts serial input/output without chip deselect, SCK and SI become don't care, CS must be retained low during hold operation. |
| 8 | VDD | power_in | Supply Voltage pin; operating power supply voltage 2.7 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FUJITSU |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
MB85RS16NPNF-G-JNERE1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mb85rs16npnf-g-jnere1-etched.step/mb85rs16npnf-g-jnere1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mb85rs16npnf-g-jnere1.step/mb85rs16npnf-g-jnere1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FUJITSU datasheet (36 pp, sha256
6441dea2ac35188e, retrieved 2026-09-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).