component
MB85RC512TPNF-G-JNERE1
Public Made by Adomby adom
FUJITSU FRAM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMB85RC512TPNF-G-JNERE1
FUJITSU · FRAM · SOP-8
MB85RC512TPNF-G-JNERE1 from FUJITSU, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address pin A0. Combined with A1/A2 selects the 3 LSBs of the I2C slave address so up to 8 MB85RC512T devices can share the same bus. Tie to VDD or VSS externally; internally pulled down, so a floating pin is read as low. |
| 2 | A1 | input | Device address pin A1. Combined with A0/A2 selects the 3 LSBs of the I2C slave address. Tie to VDD or VSS externally; internally pulled down. |
| 3 | A2 | input | Device address pin A2. Combined with A0/A1 selects the 3 LSBs of the I2C slave address. Tie to VDD or VSS externally; internally pulled down. |
| 4 | VSS | power_in | Ground reference (0 V) for the device. |
| 5 | SDA | bidirectional | I2C serial data I/O. Bidirectional line carrying address and data. Open-drain output; requires an external pull-up resistor to VDD. |
| 6 | SCL | input | I2C serial clock input. Data on SDA is sampled on the rising edge of SCL and output on the falling edge. |
| 7 | WP | input | Write Protect input. When held high, the entire memory array is write protected; when low the array is writable. Reads are always allowed regardless of WP. Internally pulled down to VSS, so an open pin is interpreted as low (write enabled). |
| 8 | VDD | power_in | Supply voltage. Operating range 1.8 V to 3.6 V. Typical operating current 1.2 mA (max at 3.4 MHz); standby 15 uA typ; sleep 4 uA typ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FUJITSU |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
MB85RC512TPNF-G-JNERE1
CAD (KiCad official)
- Symbol:
MB85RC512TPNF-G-JNERE1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
mb85rc512tpnf-g-jnere1-etched.step/mb85rc512tpnf-g-jnere1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mb85rc512tpnf-g-jnere1.step/mb85rc512tpnf-g-jnere1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FUJITSU datasheet (36 pp, sha256
2e1e8a044d3702dd, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).