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MAX9919FASA+T

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Maxim Integrated Current-Sensing Amplifiers, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Verified MAX9919FASA+T

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MAX9919FASA+T · SOIC-8-EP · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 19-page datasheet
  • ✓distributor: lcsc C2057612, digikey MAX9919FASA+TTR-ND, mouser 700-MAX9919FASA+T
  • ✓family: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-6kp8afgn/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ max9919fasa-t.kicad_sym✓ max9919fasa-t.kicad_mod✓ max9919fasa-t.step
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MAX9919FASA+T

Maxim Integrated · Current-Sensing Amplifiers · SOIC-8-EP

MAX9919FASA+T from Maxim Integrated, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RS+ input Positive current-sensing input; power side connects to the external sense resistor, with a common-mode range of -20V to +75V.
2 RS- input Negative current-sensing input; load side connects to the external sense resistor, with a common-mode range of -20V to +75V.
3 SHDN input Active-high shutdown input (logic high 2.0V min, low 0.8V max); connect to GND for normal operation.
4 GND power_in Ground.
5 OUT output Current-sense output, with VOUT proportional to VSENSE; rail-to-rail output.
6 FB input Feedback input that sets gain via a resistive divider on the MAX9918/MAX9920; leave unconnected on the MAX9919 for proper operation.
7 REFIN input Reference input; set to VCC/2 for bidirectional operation or to GND for unidirectional operation.
8 VCC power_in 5V supply voltage input (4.5V to 5.5V); bypass to GND with a 0.1µF capacitor.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package SOIC-8-EP
Category Operational Amplifier/Comparator
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -0.4 0.18 0.4 mV MAX9919_, VRS+ = VRS- = +14V, VREFIN = 0V, TA = +25°C 3
Input Offset Voltage VOS -0.9 0.9 mV MAX9919_, VRS+ = VRS- = +14V, VREFIN = 0V, TA = -40°C to +125°C 3
Input Offset Voltage VOS -0.4 0.11 0.4 mV MAX9919_, VRS+ = VRS- = -2V, VREFIN = 0V, TA = +25°C 3
Input Offset Voltage VOS -1 1 mV MAX9919_, VRS+ = VRS- = -2V, VREFIN = 0V, TA = -40°C to +125°C 3
Input Offset Voltage Drift VOSD 1.8 µV/°C MAX9919_, VRS+ = VRS- = +14V 4
Common-Mode Range VCM -20 75 V Inferred from CMRR tests 4
Common-Mode Rejection Ratio CMRR 80 dB MAX9919, -2V ≤ VCM ≤ +14V 4
Common-Mode Rejection Ratio CMRR 96 dB MAX9919, -20V ≤ VCM ≤ +75V 4
Input Bias Current IRS+, IRS- -175 175 µA -20V ≤ VCM ≤ +75V, TA = +25°C 4
Input Bias Current IRS+, IRS- -250 250 µA -20V ≤ VCM ≤ +75V, TA = -40°C to +125°C 4
Input Offset Current IRS+ - IRS- 0 8 µA 4
Input Leakage Current in Shutdown -30 30 µA -20V ≤ VCM ≤ +75V, VSHDN = VCC = 5V 4
Input Leakage Current -30 30 µA VRS+ = VRS- = +14V, +75V, VCC = 0V 4
Gain Error GE -0.45 0.13 0.45 % MAX9919F, VRS+ = VRS- = +14V, VREFIN = 0V, TA = +25°C 5
Gain Error GE -1.2 1.2 % MAX9919F, VRS+ = VRS- = +14V, VREFIN = 0V, TA = -40°C to +125°C 5
Gain Error GE -0.45 0.1 0.45 % MAX9919F, VRS+ = VRS- = -2V, VREFIN = 0V, TA = +25°C 5
Gain Error GE -0.9 0.9 % MAX9919F, VRS+ = VRS- = -2V, VREFIN = 0V, TA = -40°C to +125°C 5
Output-Voltage High VCC - VOH 3 10 mV VSENSE = 200mV, RL = 100kΩ to GND 5
Output-Voltage High VCC - VOH 12 40 mV VSENSE = 200mV, RL = 10kΩ to GND 5
Output-Voltage Low VOL 3 10 mV VSENSE = -200mV, RL = 100kΩ to VCC 5
Output-Voltage Low VOL 10 40 mV VSENSE = -200mV, RL = 10kΩ to VCC 5
REFIN Common-Mode Rejection Ratio REFINCMRR 82 103 dB 0V ≤ VREFIN ≤ (VCC - 1.9V) 6
REFIN Current IREFIN -100 100 µA VRS+ = VRS- = ±50mV 6
SHDN Logic-High VIH 2 V 6
SHDN Logic-Low VIL 0.8 V 6
SHDN Logic Input Current 5 µA 0 ≤ VSHDN ≤ VCC 6
Supply Voltage Range VCC 4.5 5.5 V Inferred from PSRR test 6
Power-Supply Rejection Ratio PSRR 74 103 dB 4.5V ≤ VCC ≤ 5.5V 6
Supply Current ICC 0.7 1.2 mA VRS+ = VRS- = +14V, TA = +25°C 6
Supply Current ICC 1.5 mA VRS+ = VRS- = +14V, TA = -40°C to +125°C 6
Supply Current ICC 1 1.6 mA VRS+ = VRS- = -2V, TA = +25°C 6
Supply Current ICC 2.2 mA VRS+ = VRS- = -2V, TA = -40°C to +125°C 6
Shutdown Supply Current ICC_SHDN 0.5 10 µA VSHDN = VCC = 5V 6
Absolute Max VCC to GND VCC -0.3 6 V 2
Absolute Max RS+, RS- to GND -30 80 V VCC = 5V 2
Absolute Max RS+, RS- to GND -15 80 V VCC = 0V, 15 minutes 2
Absolute Max Differential Input Voltage VRS+ - VRS- -15 15 V MAX9918/MAX9919, continuous 2
Absolute Max REFIN, FB, OUT to GND -0.3 V max is VCC + 0.3V 2
Absolute Max SHDN to GND -0.3 20 V 2
Absolute Max Continuous Current into Any Pin -20 20 mA Not to exceed package power dissipation 2
Continuous Power Dissipation 1951.2 mW TA = +70°C, 8-Pin SO-EP, derate 24.4mW/°C above +70°C 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range -65 150 °C 2
Lead Temperature 300 °C soldering, 10s 2
Soldering Temperature 260 °C reflow 2
Junction-to-Ambient Thermal Resistance θJA 41 °C/W Four-layer board 2
Junction-to-Case Thermal Resistance θJC 7 °C/W Four-layer board 2
Junction-to-Ambient Thermal Resistance θJA 52 °C/W Single-layer board 2
Junction-to-Case Thermal Resistance θJC 6 °C/W Single-layer board 2
Gain G 45 V/V MAX9919F 4
Small Signal -3dB Bandwidth BW 250 kHz MAX9919F, VSENSE = 50mV 6
Slew Rate SR 0.9 V/µs MAX9919F 6
Input-Referred Noise Voltage Density en 60 nV/√Hz 10kHz, MAX9918, MAX9919_ 7
Max Capacitive Load Stability 50 pF No sustained oscillations (Note 5) 7

CAD (KiCad official)

  • Symbol: MAX9919FASA+T
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: max9919fasa-t-etched.step / max9919fasa-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max9919fasa-t.step / max9919fasa-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (19 pp, sha256 f62a520074711291, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF