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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

MAX98089ETN+T

Maxim Integrated · Audio Interface ICs · TQFN-56(7x7)

MAX98089ETN+T from Maxim Integrated, in a TQFN-56(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SDOUTS2	output	S2 digital audio serial-data ADC output, with its output voltage referenced to DVDDS2.
2	BCLKS2	bidirectional	S2 digital audio bit clock, an input in slave mode and an output in master mode, referenced to DVDDS2.
3	DGND	power_in	Digital ground.
4	LRCLKS2	bidirectional	S2 audio sample-rate clock (frame sync in TDM mode), an input in slave mode and an output in master mode, referenced to DVDDS2.
5	MCLK	input	Master clock input; acceptable input frequency range is 10MHz to 60MHz.
6	DVDDS1	power_in	Digital audio interface power-supply input for S1; bypass to DGND with a 1µF capacitor.
7	SDOUTS1	output	S1 digital audio serial-data ADC output, with its output voltage referenced to DVDDS1.
8	BCLKS1	bidirectional	S1 digital audio bit clock, an input in slave mode and an output in master mode, referenced to DVDDS1.
9	SDINS1	input	S1 digital audio serial-data DAC input, referenced to DVDDS1.
10	LRCLKS1	bidirectional	S1 audio sample-rate clock (frame sync in TDM mode), an input in slave mode and an output in master mode.
11	N.C.	unconnected	No connection.
12	N.C.	unconnected	No connection.
13	N.C.	unconnected	No connection.
14	N.C.	unconnected	No connection.
15	SPKRN	output	Negative right-channel Class D speaker output.
16	SPKRGND	power_in	Right-speaker ground.
17	SPKRP	output	Positive right-channel Class D speaker output.
18	SPKRVDD	power_in	Right-speaker power supply; bypass to SPKRGND with a 1µF capacitor.
19	SPKLVDD	power_in	Left-speaker, REF and receiver amplifier power supply; bypass to SPKLGND with a 1µF and a 10µF capacitor.
20	SPKLP	output	Positive left-channel Class D speaker output.
21	SPKLGND	power_in	Left-speaker ground.
22	SPKLN	output	Negative left-channel Class D speaker output.
23	RECN/LOUTR/RXINN	bidirectional	Negative receiver amplifier output or right line output; can also serve as the negative bypass-switch input when the receiver amplifier is shut down.
24	RECP/LOUTL/RXINP	bidirectional	Positive receiver amplifier output or left line output; can also serve as the positive bypass-switch input when the receiver amplifier is shut down.
25	PVDD	power_in	Headphone power supply; bypass to HPGND with a 1µF and a 10µF capacitor.
26	C1P	passive	Charge-pump flying capacitor positive terminal; connect a 1µF ceramic capacitor between C1N and C1P.
27	C1N	passive	Charge-pump flying capacitor negative terminal; connect a 1µF ceramic capacitor between C1N and C1P.
28	N.C.	unconnected	No connection.
29	N.C.	unconnected	No connection.
30	HPGND	power_in	Headphone ground.
31	HPVSS	power_out	Inverting charge-pump output; bypass to HPGND with a 1µF ceramic capacitor.
32	HPVDD	power_out	Noninverting charge-pump output; bypass to HPGND with a 1µF ceramic capacitor.
33	HPL	output	Left-channel headphone output.
34	HPSNS	input	Headphone amplifier ground sense; connect to the headphone jack ground terminal for optimal performance or to PCB ground.
35	HPR	output	Right-channel headphone output.
36	INB2	input	Single-ended line input B2, also the positive differential line input B.
37	INB1	input	Single-ended line input B1, also the negative differential line input B.
38	INA2/EXTMICN	input	Single-ended line input A2, also the positive differential line input A or the negative differential external microphone input.
39	INA1/EXTMICP	input	Single-ended line input A1, also the negative differential line input A or the positive differential external microphone input.
40	MIC1P/DIGMICDATA	input	Positive differential microphone 1 input, AC-coupled with a series 1µF capacitor; can be retasked as a digital microphone data input.
41	MIC1N/DIGMICCLK	bidirectional	Negative differential microphone 1 input, AC-coupled with a series 1µF capacitor; can be retasked as a digital microphone clock output.
42	MIC2P	input	Positive differential microphone 2 input, AC-coupled with a series 1µF capacitor.
43	MIC2N	input	Negative differential microphone 2 input, AC-coupled with a series 1µF capacitor.
44	MICBIAS	power_out	Low-noise bias voltage output of 2.2V for microphones; an external 2.2kΩ resistor should be placed between MICBIAS and the microphone output.
45	JACKSNS	input	Jack sense input that detects insertion and removal of a jack; in typical applications connect to the MIC pole of the jack.
46	N.C.	unconnected	No connection.
47	AGND	power_in	Analog ground.
48	REF	passive	Converter reference; bypass to AGND with a 2.2µF capacitor.
49	REG	passive	Common-mode voltage reference; bypass to AGND with a 1µF capacitor.
50	AVDD	power_in	Analog power supply; bypass to AGND with a 1µF capacitor.
51	SCL	input	I2C serial-clock input; connect a pullup resistor to DVDD for full output swing.
52	SDA	bidirectional	I2C serial-data input/output; connect a pullup resistor to DVDD for full output swing.
53	DVDD	power_in	Digital power supply for the digital core and I2C interface; bypass to DGND with a 1µF capacitor.
54	SDINS2	input	S2 digital audio serial-data DAC input, referenced to DVDDS2.
55	DVDDS2	power_in	Digital audio interface power-supply input for S2; bypass to DGND with a 1µF capacitor.
56	IRQ	output	Hardware interrupt output that pulls low when bits in status register 0x00 change state; connect a 10kΩ pullup resistor to DVDD for full output swing.
57	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Maxim Integrated
Package	TQFN-56(7x7)
Category	Communication Interface Chip/UART/485/232
Pins	57

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage absolute maximum (DVDD, AVDD, PVDD, HPVDD)		-0.3		2.2	V	Voltages with respect to AGND	6
Supply voltage absolute maximum (SPKLVDD, SPKRVDD, DVDDS1, DVDDS2)		-0.3		6	V	Voltages with respect to AGND	6
Ground pins absolute maximum (DGND, HPGND, SPKLGND, SPKRGND)		-0.1		0.1	V	Voltages with respect to AGND	6
Digital pins absolute maximum (MCLK, SDINS1, SDINS2, JACKSNS, SDA, SCL, IRQ)		-0.3		6	V	Voltages with respect to AGND	6
Analog/mic pins absolute maximum (REG, INA1/EXTMICP, INA2/EXTMICN, INB1, INB2, MIC1P/DIGMICDATA, MIC1N/DIGMICCLK, MIC2P, MIC2N)		-0.3		2.2	V	Voltages with respect to AGND	6
Operating temperature range		-40		85	°C		6
Storage temperature range		-65		150	°C		6
Lead temperature				300	°C	TQFN only, soldering, 10s	6
Soldering temperature (reflow)				260	°C		6
Supply voltage range, speaker supplies	VSPKLVDD, VSPKRVDD	2.8		5.5	V	Guaranteed by PSRR	6
Supply voltage range, analog/digital/PVDD	VDVDD, VAVDD, VPVDD	1.65	1.8	2	V		6
Supply voltage range, digital I/O supplies	VDVDDS1, VDVDDS2	1.65		3.6	V		6
Total supply current, analog	IVDD		4.5	8	mA	Full-duplex 8kHz mono, receiver output, MAS = 1; Analog	6
Total supply current, speaker	IVDD		1.6	2.3	mA	Full-duplex 8kHz mono, receiver output, MAS = 1; Speaker	6
Total supply current, digital	IVDD		1.3	2	mA	Full-duplex 8kHz mono, receiver output, MAS = 1; Digital	6
Total supply current, analog (HP playback)	IVDD		1.9	3	mA	DAC playback 48kHz stereo, headphone outputs, MAS = 1; Analog	6
Total supply current, speaker (HP playback)	IVDD		0.001	0.0058	mA	DAC playback 48kHz stereo, headphone outputs, MAS = 1; Speaker	6
Total supply current, digital (HP playback)	IVDD		2.47	3.5	mA	DAC playback 48kHz stereo, headphone outputs, MAS = 1; Digital	6
Total supply current, analog (speaker playback)	IVDD		3.6	6.5	mA	DAC playback 48kHz stereo, speaker outputs, MAS = 1; Analog	6
Total supply current, speaker (speaker playback)	IVDD		6.41	8.5	mA	DAC playback 48kHz stereo, speaker outputs, MAS = 1; Speaker	6
Total supply current, digital (speaker playback)	IVDD		2.49	3.5	mA	DAC playback 48kHz stereo, speaker outputs, MAS = 1; Digital	6
Shutdown supply current, analog			0.2	2	µA	TA = +25°C	6
Shutdown supply current, speaker			0.01	1	µA	TA = +25°C	6
Shutdown supply current, digital			1	5	µA	TA = +25°C	6
MICBIAS output voltage	VMICBIAS	2.15	2.2	2.25	V	ILOAD = 1mA	8
Microphone preamplifier gain	AVMICPRE_	19.5	20	20.5	dB	PA1EN/PA2EN = 10	7
Microphone preamplifier gain	AVMICPRE_	29.5	30	30.5	dB	PA1EN/PA2EN = 11	7
Microphone PGA gain	AVMICPGA_	19	20	21	dB	PGAM1/PGAM2 = 0x00	7
Line input level adjust gain	AVPGAIN_	19	20	21	dB	TA = +25°C; PGAINA/PGAINB = 0x0	9
Line input level adjust gain	AVPGAIN_	13	14	15	dB	PGAINA/PGAINB = 0x1	9
Line input level adjust gain	AVPGAIN_	-4	-3	-2	dB	PGAINA/PGAINB = 0x4	9
Line input level adjust gain	AVPGAIN_	-7	-6	-5	dB	PGAINA/PGAINB = 0x5, 0x6, 0x7	9
Line input resistance	RIN	14.5	21	28	kΩ	AVPGAIN_ = +20dB	9
Line input resistance	RIN	7.5	10	14	kΩ	AVPGAIN_ = 0dB	9
Feedback resistance	RIN_FB	18	20	22	kΩ	TA = +25°C; INAEXT/INBEXT = 1	9
Feedback resistance	RIN_FB	16		24	kΩ	TA = TMIN to TMAX; INAEXT/INBEXT = 1	9
ADC level adjust range	AVADCLVL	-12		3	dB	AVL/AVR = 0xF to 0x0 (Note 5)	9
ADC gain adjust range	AVADCGAIN	0		18	dB	AVLG/AVRG = 00 to 11 (Note 5)	9
Voice mode IIR lowpass passband ripple		-0.1		0.1	dB	f < fPLP	9
Microphone AGC threshold level		-3		18	dB	AGCTH = 0x0 to 0xF	11
Microphone AGC gain		0		20	dB	(Note 5)	11
ADC noise gate threshold level		-64		-16	dB	ANTH = 0x3 to 0xF, referred to 0dBFS	11
ADC noise gate attenuation		0		12	dB	(Note 5)	11
DAC attenuation range	AVDACATTN	-15		0	dB	DV_ = 0xF to 0x0 (Note 5)	11
DAC gain adjust range	AVDACGAIN	0		18	dB	DV1G = 00 to 11 (Note 5)	11
Receiver volume control	AVREC	-62		8	dB	RECVOL = 0x00 (min) to 0x1F (max)	14
Line output amplifier output offset voltage	VOS	-4	0.5	4	mV	AVREC_ = -62dB, TQFN package only	14
Speaker volume control	AVSPK_	-62		8	dB	SPVOLL/SPVOLR = 0x00 (min) to 0x1F (max)	15
Speaker amplifier output offset voltage	VOS	-3	0.5	3	mV	AVSPK_ = -61dB, TA = +25°C	16
Excursion limiter upper corner frequency range		400		1000	Hz	DHPUCF = 001 to 100	16
Power limiter weighting factor	kPWR	12.5		100	%	PWRK = 000 to 111	16
Headphone volume control	AVHP_	-67		3	dB	HPVOL_ = 0x00 (min) to 0x1F (max)	18
Headphone amplifier output offset voltage	VOS	-1	0.1	1	mV	AVHP_ = -67dB, TA = +25°C	18
Headphone amplifier output offset voltage	VOS	-3		3	mV	AVHP_ = -67dB, TA = TMIN to TMAX	18
Speaker bypass switch off-leakage current		-20		20	µA	VRXIN_ = [0V, VSPKLVDD], VSPKL_ = [VSPKLVDD, 0V]	18
Receiver bypass switch off-leakage current		-15		15	µA	VRECP = [0V, VSPKLVDD], VRECN = [VSPKLVDD, 0V]	19
JACKSNS sense resistance	RSENSE	1.6	2.4	2.9	kΩ	MICBIAS disabled, JDWK = 0	19
Battery ADC input voltage range		2.6		5.6	V		19
MCLK input frequency	fMCLK	10		60	MHz		21

CAD (KiCad official)

Symbol: MAX98089ETN+T
Footprint: Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP4x4mm
3D model: TQFN-56(7x7) (KiCad packages3D, STEP)
3D model files: max98089etn-t-etched.step / max98089etn-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max98089etn-t.step / max98089etn-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Maxim Integrated datasheet (133 pp, sha256 891c4d2f5cc45e8c, retrieved 2026-10-29, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF