component
MAX98089ETN+
Public Made by Adomby adom
Maxim Integrated Audio Interface ICs, QFN-56-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMAX98089ETN+
Maxim Integrated · Audio Interface ICs · QFN-56-EP(7x7)
MAX98089ETN+ from Maxim Integrated, in a QFN-56-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDOUTS2 | output | S2 digital audio serial-data ADC output, with output voltage referenced to DVDDS2. |
| 2 | BCLKS2 | bidirectional | S2 digital audio bit clock, an input in slave mode and an output in master mode, with voltage referenced to DVDDS2. |
| 3 | DGND | power_in | Digital ground. |
| 4 | LRCLKS2 | bidirectional | S2 digital audio left-right clock (frame sync pulse in TDM mode), an input in slave mode and an output in master mode, with voltage referenced to DVDDS2. |
| 5 | MCLK | input | Master clock input accepting 10MHz to 60MHz. |
| 6 | DVDDS1 | power_in | S1 digital audio interface power-supply input, bypassed to DGND with a 1µF capacitor. |
| 7 | SDOUTS1 | output | S1 digital audio serial-data ADC output, with output voltage referenced to DVDDS1. |
| 8 | BCLKS1 | bidirectional | S1 digital audio bit clock, an input in slave mode and an output in master mode, with voltage referenced to DVDDS1. |
| 9 | SDINS1 | input | S1 digital audio serial-data DAC input, with voltage referenced to DVDDS1. |
| 10 | LRCLKS1 | bidirectional | S1 digital audio left-right clock (frame sync pulse in TDM mode), an input in slave mode and an output in master mode. |
| 11 | N.C. | unconnected | No connection. |
| 12 | N.C. | unconnected | No connection. |
| 13 | N.C. | unconnected | No connection. |
| 14 | N.C. | unconnected | No connection. |
| 15 | SPKRN | output | Negative right-channel Class D speaker output. |
| 16 | SPKRGND | power_in | Right-speaker ground. |
| 17 | SPKRP | output | Positive right-channel Class D speaker output. |
| 18 | SPKRVDD | power_in | Right-speaker power supply, bypassed to SPKRGND with a 1µF capacitor. |
| 19 | SPKLVDD | power_in | Left-speaker, REF and receiver amp power supply, bypassed to SPKLGND with a 1µF and a 10µF capacitor. |
| 20 | SPKLP | output | Positive left-channel Class D speaker output. |
| 21 | SPKLGND | power_in | Left-speaker ground. |
| 22 | SPKLN | output | Negative left-channel Class D speaker output. |
| 23 | RECN/LOUTR/RXINN | bidirectional | Negative receiver amplifier output or right line output; can be the negative bypass switch input when the receiver amp is shut down. |
| 24 | RECP/LOUTL/RXINP | bidirectional | Positive receiver amplifier output or left line output; can be the positive bypass switch input when the receiver amp is shut down. |
| 25 | PVDD | power_in | Headphone power supply, bypassed to HPGND with a 1µF and a 10µF capacitor. |
| 26 | C1P | passive | Charge-pump flying capacitor positive terminal; connect a 1µF ceramic capacitor between C1N and C1P. |
| 27 | C1N | passive | Charge-pump flying capacitor negative terminal; connect a 1µF ceramic capacitor between C1N and C1P. |
| 28 | N.C. | unconnected | No connection. |
| 29 | N.C. | unconnected | No connection. |
| 30 | HPGND | power_in | Headphone ground. |
| 31 | HPVSS | power_out | Inverting charge-pump output, bypassed to HPGND with a 1µF ceramic capacitor. |
| 32 | HPVDD | power_out | Noninverting charge-pump output, bypassed to HPGND with a 1µF ceramic capacitor. |
| 33 | HPL | output | Left-channel headphone output. |
| 34 | HPSNS | input | Headphone amplifier ground sense; connect to the headphone jack ground terminal for optimal performance or to PCB ground. |
| 35 | HPR | output | Right-channel headphone output. |
| 36 | INB2 | input | Single-ended line input B2, also the positive differential line input B. |
| 37 | INB1 | input | Single-ended line input B1, also the negative differential line input B. |
| 38 | INA2/EXTMICN | input | Single-ended line input A2, also positive differential line input A or negative differential external microphone input. |
| 39 | INA1/EXTMICP | input | Single-ended line input A1, also negative differential line input A or positive differential external microphone input. |
| 40 | MIC1P/DIGMICDATA | input | Positive differential microphone 1 input, AC-coupled with a series 1µF capacitor; can be retasked as a digital microphone data input. |
| 41 | MIC1N/DIGMICCLK | bidirectional | Negative differential microphone 1 input, AC-coupled with a series 1µF capacitor; can be retasked as a digital microphone clock output. |
| 42 | MIC2P | input | Positive differential microphone 2 input, AC-coupled with a series 1µF capacitor. |
| 43 | MIC2N | input | Negative differential microphone 2 input, AC-coupled with a series 1µF capacitor. |
| 44 | MICBIAS | power_out | Low-noise 2.2V microphone bias output; place an external 2.2kΩ resistor between MICBIAS and the microphone output. |
| 45 | JACKSNS | input | Jack sense input that detects insertion and removal of a jack; typically connected to the MIC pole of the jack. |
| 46 | N.C. | unconnected | No connection. |
| 47 | AGND | power_in | Analog ground. |
| 48 | REF | passive | Converter reference, bypassed to AGND with a 2.2µF capacitor. |
| 49 | REG | passive | Common-mode voltage reference, bypassed to AGND with a 1µF capacitor. |
| 50 | AVDD | power_in | Analog power supply, bypassed to AGND with a 1µF capacitor. |
| 51 | SCL | input | I2C serial-clock input; connect a pullup resistor to DVDD. |
| 52 | SDA | bidirectional | I2C serial-data input/output; connect a pullup resistor to DVDD for full output swing. |
| 53 | DVDD | power_in | Digital power supply for the digital core and I2C interface, bypassed to DGND with a 1µF capacitor. |
| 54 | SDINS2 | input | S2 digital audio serial-data DAC input, with voltage referenced to DVDDS2. |
| 55 | DVDDS2 | power_in | S2 digital audio interface power-supply input, bypassed to DGND with a 1µF capacitor. |
| 56 | IRQ | output | Hardware interrupt output that can be programmed to pull low on status register 0x00 changes; connect a 10kΩ pullup resistor to DVDD for full output swing. |
| 57 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | QFN-56-EP(7x7) |
| Category | Interface ICs |
| Pins | 57 |
CAD (KiCad official)
- Symbol:
MAX98089ETN+ - Footprint:
Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP4x4mm - 3D model: QFN-56-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
max98089etn-etched.step/max98089etn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max98089etn.step/max98089etn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Maxim Integrated datasheet (133 pp, sha256
891c4d2f5cc45e8c, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).