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MAX9406ETM+

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Maxim Integrated Video Interface ICs, TQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcommunication interface chip-uart-485-232max9406etm+factory-2.0.0extractor-text

Verified MAX9406ETM+

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 49 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MAX9406ETM+ · TQFN-48(7x7) · 49 pins
  • ✓copper: 49 copper pads, none touching another net
  • ✓datasheet: all 49 pin names found in the 11-page datasheet
  • ✓distributor: lcsc C3824004, digikey MAX9406ETM+-ND, mouser 700-MAX9406ETM
  • ✓family: QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-vqjk5ego/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 49 pins = 49 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 49 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ max9406etm.kicad_sym✓ max9406etm.kicad_mod✓ max9406etm.step
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MAX9406ETM+

Maxim Integrated · Video Interface ICs · TQFN-48(7x7)

MAX9406ETM+ from Maxim Integrated, in a TQFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground.
5 GND power_in Ground.
12 GND power_in Ground.
18 GND power_in Ground.
24 GND power_in Ground.
27 GND power_in Ground.
31 GND power_in Ground.
36 GND power_in Ground.
37 GND power_in Ground.
43 GND power_in Ground.
2 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
11 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
15 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
21 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
26 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
33 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
40 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
46 VCC power_in Power-supply input (3V to 3.6V); bypass VCC to GND with 0.1µF and 0.01µF capacitors as close to the supply pins as possible.
3 N.C. unconnected No connection; not internally connected, leave unconnected.
4 N.C. unconnected No connection; not internally connected, leave unconnected.
6 N.C. unconnected No connection; not internally connected, leave unconnected.
10 N.C. unconnected No connection; not internally connected, leave unconnected.
34 N.C. unconnected No connection; not internally connected, leave unconnected.
35 N.C. unconnected No connection; not internally connected, leave unconnected.
7 HPD_SRC output Hot-plug detection at 3.3V logic, translated from the 5V HPD_SNK input.
8 SDA_SRC bidirectional Serial data line, I2C data line at 3.3V logic.
9 SCL_SRC bidirectional Serial clock line, I2C clock line at 3.3V logic.
13 OUT_D4+ output Differential CML output port 4+, terminate through 50Ω to VCC.
14 OUT_D4- output Differential CML output port 4-, terminate through 50Ω to VCC.
16 OUT_D3+ output Differential CML output port 3+, terminate through 50Ω to VCC.
17 OUT_D3- output Differential CML output port 3-, terminate through 50Ω to VCC.
19 OUT_D2+ output Differential CML output port 2+, terminate through 50Ω to VCC.
20 OUT_D2- output Differential CML output port 2-, terminate through 50Ω to VCC.
22 OUT_D1+ output Differential CML output port 1+, terminate through 50Ω to VCC.
23 OUT_D1- output Differential CML output port 1-, terminate through 50Ω to VCC.
25 OE input Output enable; drive low to enable the outputs and high to disable them (VIH min 2.4V, VIL max 0.5V).
28 SCL_SNK bidirectional Serial clock line, I2C clock line at 5V logic.
29 SDA_SNK bidirectional Serial data line, I2C data line at 5V logic.
30 HPD_SNK input Hot-plug detection at +5V logic with an internal 40kΩ to 60kΩ pulldown.
32 DDC_EN input DDC link enable; high enables data to pass through the DDC, low disables the DDC link.
38 IN_D1- input Differential input port 1- with integrated 50Ω termination.
39 IN_D1+ input Differential input port 1+ with integrated 50Ω termination.
41 IN_D2- input Differential input port 2- with integrated 50Ω termination.
42 IN_D2+ input Differential input port 2+ with integrated 50Ω termination.
44 IN_D3- input Differential input port 3- with integrated 50Ω termination.
45 IN_D3+ input Differential input port 3+ with integrated 50Ω termination.
47 IN_D4- input Differential input port 4- with integrated 50Ω termination.
48 IN_D4+ input Differential input port 4+ with integrated 50Ω termination.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package TQFN-48(7x7)
Category Communication Interface Chip/UART/485/232
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
OE Input High Level VIH1 2.4 V 2
OE Input Low Level VIL1 0.5 V 2
OE Input Current IIN-EN 24 µA VIN = 0 to VCC 2
DDC_EN Input High Level VIH1 2.4 V 2
DDC_EN Input Low Level VIL1 0.5 V 2
DDC_EN Input Current IIN-DDC 100 µA VIN = 0 to VCC 2
HPD Input High Level VIH2 2.4 5.3 V 2
HPD Input Low Level VIL2 0.8 V 2
HPD Input Current IIN2 80 µA VIN = 0 to VCC 2
HPD_SNK Pulldown Resistance RHPD 40 60 kΩ 2
HPD Output High Level VOH-HPDB 2.5 V 2
HPD Output Low Level VOL-HPDB 0 0.18 0.4 V 2
Differential Input High Threshold VIDH 50 mV VID = VIN+ - VIN- 2
Differential Input Low Threshold VIDL -50 mV VID = VIN+ - VIN- 2
Common Input Voltage VCOM 0 1.43 2 V VCOD = DC Avg [(VIN+ + VIN-) / 2] 2
Common-Mode AC Tolerance VCM_AC_P-P 100 mV VCM_AC_P-P = (VIN+ + VIN-) / 2 - VCOD 2
Differential Input Termination RIN 40 60 Ω 2
Single-Ended Output Swing VOSW 450 600 mV With a 50Ω load to VCC at both pins 3
Single-Ended Output Current in High-Z IOFF -10 10 µA 3
Output Short-Circuit Current IOS -20 20 mA Output pins connected to VCC or GND 3
Supply Current ICC 77 90 mA Includes 4 channels CML termination supply current, OE = 0 3
Supply Current (power-down) IPD 5 mA OE = 1 3
Maximum Data Rate rD 1.85 Gbps 3
Differential Propagation Delay tPD 350 500 ps 3
Channel-to-Channel Skew tSK 20 50 ps 3
Output Rise/Fall Time tR/F 180 515 ps 3
Added Random Jitter tRJ 0.5 1 psRMS 1GHz clock input 3
Added Deterministic Jitter tDJ 11 30 psP-P rD = 2Gbps, 2^23 - 1 PRBS pattern 3
CLK Frequency fSCK 400 kHz Supports I2C fast mode 3
HPD_SRC Rise/Fall Time tRF-HPDB 1 20 ns 3
HPD Propagation Delay tHPD 200 ns 3
Supply Voltage VCC 3 3.3 3.6 V TA = -40°C to +85°C 2
Operating Temperature Range TA -40 85 °C 2
VCC to GND VCC -0.3 4 V 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range TSTG -65 150 °C 2
ESD Protection (HBM) -1.5 1.5 kV Human Body Model (RD = 1.5kΩ, CS = 100pF), IN_D_ and OUT_D_ to GND 2
Lead Temperature 300 °C soldering, 10s 2
Junction-to-Case Thermal Resistance θJC 0.8 °C/W 48-Pin Thin QFN 2
Junction-to-Ambient Thermal Resistance θJA 25 °C/W 48-Pin Thin QFN 2

CAD (KiCad official)

  • Symbol: MAX9406ETM+
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: TQFN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: max9406etm-etched.step / max9406etm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max9406etm.step / max9406etm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (11 pp, sha256 0fc0f5d67cb0d156, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF