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MAX9052AESA+

Analog Devices Inc./Maxim Integrated · Comparators · SOIC-8

MAX9052AESA+ from Analog Devices Inc./Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Comparator A output with rail-to-rail push-pull stage that sinks and sources up to 8mA.
2 REF output Reference voltage output (2.500V for MAX9052), can sink or source up to 500µA and is stable for 0 to 4.7nF load capacitance.
3 INA+ input Comparator A noninverting input with common-mode range extending 0.25V beyond each supply rail.
4 VEE power_in Negative supply voltage (ground in single-supply operation).
5 INB+ input Comparator B noninverting input with common-mode range extending 0.25V beyond each supply rail.
6 INB- input Comparator B inverting input with common-mode range extending 0.25V beyond each supply rail.
7 OUTB output Comparator B output with rail-to-rail push-pull stage that sinks and sources up to 8mA.
8 VCC power_in Positive supply voltage, 2.7V to 5.5V for MAX9052.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc./Maxim Integrated
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range VCC 2.7 5.5 V MAX9050-MAX9053 2
Supply Current ICC 55 80 µA MAX9052/MAX9053, VCC = 2.7V 2
Supply Current ICC 60 85 µA MAX9052/MAX9053, VCC = 5V 2
Input Offset Voltage VOS 0.5 5 mV Over entire common-mode range, TA = +25°C (printed ±) 2
Input Offset Voltage VOS 7 mV Over entire common-mode range, TA = -40°C to +85°C (printed ±) 2
Input Bias Current IB 0.001 10 nA Specified common-mode range (printed ±) 2
Common-Mode Voltage Range CMVR -0.25 0.25 V TA = +25°C; printed VEE - 0.25 min, VCC + 0.25 max (offsets from rails) 2
Common-Mode Voltage Range CMVR 0 V TA = -40°C to +85°C; printed VEE min, VCC max (relative to rails) 2
Common-Mode Rejection Ratio CMRR 52 80 dB Specified common-mode range 2
Power-Supply Rejection Ratio PSRR 55 80 dB MAX9050-MAX9053, 2.5V ≤ VCC ≤ 5.5V 2
Output Voltage Low VOL 0.2 0.55 V VCC = 5V, ISINK = 8mA 2
Output Voltage Low VOL 0.15 0.4 V VCC = 2.7V, ISINK = 3.5mA 2
Output Voltage High VOH 4.45 4.85 V VCC = 5V, ISOURCE = 8mA 3
Output Voltage High VOH 2.3 2.55 V VCC = 2.7V, ISOURCE = 3.5mA 3
Reference Output Voltage VREF 2.49 2.5 2.51 V TA = +25°C, MAX9050-MAX9053 3
Reference Output Voltage Temperature Coefficient TCVREF 6 30 ppm/°C µMAX/SO 3
Reference Line Regulation ΔVREF/ΔVCC 50 200 µV/V 2.7V ≤ VCC ≤ 5.5V, MAX9050-MAX9053 3
Reference Load Regulation (sourcing) ΔVREF/ΔIREF 2 4 µV/µA Sourcing, 0µA ≤ IREF ≤ 500µA 3
Reference Load Regulation (sinking) ΔVREF/ΔIREF 3.5 6 µV/µA Sinking, -500µA ≤ IREF ≤ 0µA 3
Capacitive-Load Stability Range CL(VREF) 0 4.7 nF 3
Input Hysteresis VHYST 3 mV printed ± 2
Input Offset Current IOS 0.5 pA Specified common-mode range (printed ±) 2
Input Capacitance CIN 2.5 pF 2
Output Short-Circuit Current ISC 95 mA VOUT = VEE or VCC, VCC = 5V 2
Output Short-Circuit Current ISC 35 mA VOUT = VEE or VCC, VCC = 2.7V 2
Output Rise/Fall Time tR/tF 50 ns CL = 50pF 3
Output Propagation Delay tPD+/tPD- 450 ns CL = 15pF, VCC = 2.7V, 50mV overdrive 3
Output Propagation Delay tPD+/tPD- 400 ns CL = 15pF, VCC = 2.7V, 100mV overdrive 3
Power-Up Time tPU 20 µs Time to VOUT valid logic state 3
Reference Output Short-Circuit Current ISC 4 mA VREF = VEE or VCC 3
Thermal Hysteresis THYST 130 ppm 3
Long-Term Stability 50 ppm 1000h at TA = +25°C 3
Noise Voltage EOUT 40 µVP-P f = 0.1Hz to 10Hz 3
Noise Voltage EOUT 105 µVRMS f = 10Hz to 10kHz 3
Ripple Rejection ΔVREF/ΔVCC 84 dB VCC = 5V ±100mV, f = 120Hz 3
Turn-On Settling Time tR(VREF) 200 µs To VREF = 1% of final value 3
Supply Voltage (VCC to VEE) -0.3 6 V 2
All Other Pins -0.3 0.3 V (VEE - 0.3V) to (VCC + 0.3V) 2
Current into Input Pins -20 20 mA printed ±20mA 2
Operating Temperature Range -40 85 °C MAX9039-43, MAX9051-53 2
Junction Temperature 150 °C 2
Storage Temperature Range -65 150 °C 2
Lead Temperature 300 °C soldering, 10s 2

CAD (KiCad official)

  • Symbol: MAX9052AESA+
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: max9052aesa-etched.step / max9052aesa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max9052aesa.step / max9052aesa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc./Maxim Integrated datasheet (15 pp, sha256 2d01857c0c7aef4a, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF