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MAX8556ETE+T
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Analog Devices Inc Maxim Integrated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TQFN-16-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+104docs/hero.pngdocs/max8556ete-t-datasheet.pdfmax8556ete-t-etched.glbmax8556ete-t-hero.glbmax8556ete-t-hero.overlay.json+449max8556ete-t.glbmax8556ete-t.kicad_mod+295max8556ete-t.kicad_sym+81max8556ete-t.lbr+159max8556ete-t.step+4455package.json+248page.json+254viewers/footprint.html+1viewers/symbol.html+1README.mdadded+104@@ -0,0 +1,104 @@+# MAX8556ETE+T++**Analog Devices Inc Maxim Integrated** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TQFN-16-EP(5x5)++MAX8556ETE+T from Analog Devices Inc Maxim Integrated, in a TQFN-16-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | power_in | LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND. |+| 2 | IN | power_in | LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND. |+| 3 | IN | power_in | LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND. |+| 4 | IN | power_in | LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND. |+| 5 | IN | power_in | LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND. |+| 6 | IN | power_in | LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND. |+| 7 | OUT | power_out | LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; a smaller capacitance can be used if the maximum load current is less than 4A. |+| 8 | OUT | power_out | LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; a smaller capacitance can be used if the maximum load current is less than 4A. |+| 9 | OUT | power_out | LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; a smaller capacitance can be used if the maximum load current is less than 4A. |+| 10 | OUT | power_out | LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; a smaller capacitance can be used if the maximum load current is less than 4A. |+| 11 | OUT | power_out | LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; a smaller capacitance can be used if the maximum load current is less than 4A. |+| 12 | POK | output | Open-drain power-OK output that is high impedance when VOUT is within ±10% of nominal and pulls low when VOUT is outside that range or when EN is low; connect a resistor to a logic supply of less than 3.6V. |+| 13 | FB | input | Feedback input regulated to 0.5V; connect to the center tap of a resistor divider from the output to GND to set the output voltage. |+| 14 | GND | power_in | Ground. |+| 15 | N.C. | unconnected | Not connected internally; connect to GND or leave unconnected. |+| 16 | EN | input | Enable input; connect to GND or a logic low to shut the device down, and to IN or a logic high for normal operation. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices Inc Maxim Integrated |+| Package | TQFN-16-EP(5x5) |+| Category | Power Management (PMIC) |+| Pins | 17 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Input Voltage Range | | 1.425 | | 3.6 | V | | 2 |+| Input Undervoltage Lockout (VIN rising) | | 1.3 | 1.35 | 1.4 | V | VIN rising, 70mV hysteresis | 2 |+| Input Undervoltage Lockout (VIN falling) | | 1.23 | 1.28 | 1.33 | V | VIN falling | 2 |+| Output Voltage Range | | 0.5 | | 3.4 | V | | 2 |+| Line Regulation | | -0.15 | 0 | 0.15 | %/V | VIN = 1.425V to 3.6V, VOUT = 1.225V | 2 |+| Dropout Voltage | | | 100 | 200 | mV | VIN = 1.425V, IOUT = 4A, VFB = 480mV | 2 |+| Regulated Output-Voltage Current Limit | | 5 | 7 | 9 | A | VIN = 3.6V, VOUT = 3V, VFB = 460mV | 2 |+| Load Capacitance | | 16 | | 120 | µF | ESR < 50mA (Note 3) | 2 |+| FB Threshold Accuracy | | 495 | 500 | 505 | mV | VOUT = 1.225V to 3V, VIN = VOUT + 0.2V to 3.6V, IOUT = 2mA to 4A (Note 4) | 2 |+| FB Input Bias Current | | | 0.001 | 1 | µA | VFB = 0.5V, VIN = 3.6V | 2 |+| GND Supply Current | | | 800 | 1600 | µA | VIN = 1.425V to 3.6V, VOUT = 1.225V | 3 |+| GND Supply Current (Dropout) | | | 1000 | 2000 | µA | VIN = 3.6V, VFB = 480mV | 3 |+| GND Shutdown Current | | | | 150 | µA | VIN = 3.6V, EN = GND | 3 |+| FB Power-OK Fault Threshold (FB high) | | 540 | 550 | 560 | mV | FB moving out of regulation, VIN = 1.425V to 3.6V, 10mV hysteresis | 3 |+| FB Power-OK Fault Threshold (FB low) | | 440 | 450 | 460 | mV | FB moving out of regulation, VIN = 1.425V to 3.6V, 10mV hysteresis | 3 |+| POK Output Voltage, Low | | | 25 | 200 | mV | VFB = 0.4V or 0.6V, IPOK = 2mA | 3 |+| POK Output Current, High | | | 0.001 | 1 | µA | VPOK = 3.6V VFB = 0.5 | 3 |+| Enable Input Bias Current | | -1 | | 1 | µA | VEN = 0V or 3.6V | 3 |+| POR FB Power-On Reset Fault Threshold | | 440 | 450 | 460 | mV | FB falling, VIN = 1.425V to 3.6V, 10mV hysteresis | 3 |+| POR Output Voltage, Low | | | 25 | 200 | mV | VFB = 0.4V, IPOR = 2mA | 3 |+| POR Output Current, High | | | 0.001 | 1 | µA | VPOR = 3.6V, VFB = 0.5V | 3 |+| POK Delay Time | | 25 | 50 | 100 | µs | FB rising to POK high | 3 |+| POR Rising Delay Time | | 100 | 140 | 200 | ms | FB rising to POR high impedance | 3 |+| Absolute Maximum: IN, EN, POK, POR to GND | | -0.3 | | 4 | V | | 2 |+| Absolute Maximum: FB, OUT to GND (max is VIN + 0.3V) | | -0.3 | | | V | | 2 |+| Operating Temperature Range | | -40 | | 85 | °C | | 2 |+| Junction Temperature | TJ | | | 150 | °C | | 2 |+| Storage Temperature Range | | -65 | | 150 | °C | | 2 |+| Lead Temperature | | | | 300 | °C | soldering, 10s | 2 |+| Thermal-Shutdown Threshold (TJ rising) | | | 160 | | °C | Output on and off | 3 |+| Thermal-Shutdown Threshold (TJ falling) | | | 115 | | °C | Output on and off | 3 |+| Soft-Start Time | | | 100 | | µs | | 3 |+| Load Regulation | | | 0.1 | | %/A | IOUT = 2mA to 4A | 2 |+| Enable Input Threshold (EN rising) | | | 1.25 | | V | VIN = 1.425V to 3.6V | 3 |+| Enable Input Threshold (EN falling) | | | 0.4 | | V | VIN = 1.425V to 3.6V | 3 |+| Thermal Resistance, Junction-to-Case (16-pin TQFN) | θJC | | 1.7 | | °C/W | junction to case, 16-pin TQFN | 11 |++## Materials and finish++As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).++| Part | Material | Colour / plating | Datasheet says | Page |+|---|---|---|---|---|+| contacts | copper | | (1.7°C/W for the 16-pin TQFN) θCA = the thermal resistance from the case to the surrounding air through the PCB, copper traces, and the | 11 |++## CAD (KiCad official)++- Symbol: `MAX8556ETE+T`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_5x5mm_P0.8mm_EP2.7x2.7mm`+- 3D model: TQFN-16-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `max8556ete-t-etched.step` / `max8556ete-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max8556ete-t.step` / `max8556ete-t.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices Inc Maxim Integrated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912372916764672) (12 pp, sha256 `4fa6f5030655818e`, retrieved 2026-10-18, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/max8556ete-t-datasheet.pdf)
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max8556ete-t.stepadded+4455@@ -0,0 +1,4455 @@+ISO-10303-21; +HEADER; +/* QFN-16-1EP_5x5mm_Pitch0.8mm.step 3D STEP model for use in ECAD systems + * Copyright (C) 2017, kicad StepUp + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see http://www.gnu.org/licenses/. + * + * As a special exception, if you create a design which uses this symbol, + * and embed this symbol or unaltered portions of this symbol into the design, + * this symbol does not by itself cause the resulting design to be covered by + * the GNU General Public License. + * This exception does not however invalidate any other reasons why the design + * itself might be covered by the GNU General Public License. + * If you modify this symbol, you may extend this exception to your version of the symbol, + * but you are not obligated to do so. + * If you do not wish to do so, delete this exception statement from your version + * Risk disclaimer + * *USE 3D CAD DATA AT YOUR OWN RISK* + * *DO NOT RELY UPON ANY INFORMATION FOUND HERE WITHOUT INDEPENDENT VERIFICATION.* + * + */ + +FILE_DESCRIPTION( +/* description */ ('model of QFN-16-1EP_5x5mm_Pitch0.8mm'), +/* implementation_level */ '2;1'); + +FILE_NAME( +/* name */ 'QFN-16-1EP_5x5mm_Pitch0.8mm.step', +/* time_stamp */ '2017-03-23T11:13:37', +/* author */ ('kicad StepUp','ksu'), +/* organization */ ('FreeCAD'), +/* preprocessor_version */ 'OCC', +/* originating_system */ 'kicad StepUp', +/* authorisation */ ''); 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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "max8556ete+t",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "max8556ete-t.kicad_sym",+ "max8556ete-t.kicad_mod",+ "max8556ete-t.glb",+ "max8556ete-t.step",+ "max8556ete-t.lbr",+ "docs/hero.png",+ "docs/max8556ete-t-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "max8556ete-t-hero.glb",+ "max8556ete-t-hero.overlay.json",+ "max8556ete-t-etched.glb"+ ],+ "component": {+ "mpn": "MAX8556ETE+T",+ "manufacturer": "Analog Devices Inc Maxim Integrated",+ "package": "TQFN-16-EP(5x5)",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912372916764672",+ "parts": {+ "symbol": "max8556ete-t.kicad_sym",+ "footprint": "max8556ete-t.kicad_mod",+ "model_3d": "max8556ete-t-hero.glb",+ "model_3d_plain": "max8556ete-t-etched.glb",+ "model_3d_step": "max8556ete-t-etched.step",+ "model_3d_step_plain": "max8556ete-t.step",+ "lbr": "max8556ete-t.lbr"+ },+ "distributor_links": {+ "lcsc": "C516779"+ },+ "distributor_check": {+ "checked_at": "2026-10-18T15:24:42Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "quota"+ },+ "mouser": {+ "pn": null,+ "status": "quota"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "2",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "3",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "4",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "5",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "6",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "7",+ "name": "OUT",+ "type": "power_out",+ "description": "LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; 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The MPN is MAX8556, so the name is POK; th; Pin 1-6 bypass is given as 22µF in the pin table, but the Capacitor Selection section (page 10) reco",+ "exposed pad 17 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 12,+ "cost_usd": 0.0679,+ "at": "2026-10-18T15:24:27"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912372916764672",+ "pages": 12,+ "sha256": "4fa6f5030655818e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "max8556ete-t.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5.0,+ 5.0,+ 0.92+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "f5ba59630758c2469e3be92be71139c28e26fe8e03043ebd16a162c72c4ab685",+ "checked": "2026-10-18",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "max8556ete-t-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5.0,+ 5.0,+ 0.92+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "b74ade0ac586707f887992c1f3908791cc1c3a9fcc95282f396cfc715c36ea0a",+ "checked": "2026-10-18",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ }+}
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "max8556ete+t",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "max8556ete-t.kicad_sym",+ "max8556ete-t.kicad_mod",+ "max8556ete-t.glb",+ "max8556ete-t.step",+ "max8556ete-t.lbr",+ "docs/hero.png",+ "docs/max8556ete-t-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "max8556ete-t-hero.glb",+ "max8556ete-t-hero.overlay.json",+ "max8556ete-t-etched.glb"+ ],+ "component": {+ "mpn": "MAX8556ETE+T",+ "manufacturer": "Analog Devices Inc Maxim Integrated",+ "package": "TQFN-16-EP(5x5)",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912372916764672",+ "parts": {+ "symbol": "max8556ete-t.kicad_sym",+ "footprint": "max8556ete-t.kicad_mod",+ "model_3d": "max8556ete-t-hero.glb",+ "model_3d_plain": "max8556ete-t-etched.glb",+ "model_3d_step": "max8556ete-t-etched.step",+ "model_3d_step_plain": "max8556ete-t.step",+ "lbr": "max8556ete-t.lbr"+ },+ "distributor_links": {+ "lcsc": "C516779"+ },+ "distributor_check": {+ "checked_at": "2026-10-18T15:24:42Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "quota"+ },+ "mouser": {+ "pn": null,+ "status": "quota"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "2",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "3",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "4",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "5",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "6",+ "name": "IN",+ "type": "power_in",+ "description": "LDO input, to be connected to a 1.425V to 3.6V input voltage and bypassed with a 22µF ceramic capacitor to GND."+ },+ {+ "number": "7",+ "name": "OUT",+ "type": "power_out",+ "description": "LDO output, to be bypassed with 2 x 10µF ceramic capacitors to GND; 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connect a resistor to a logic supply of less than 3.6V."+ },+ {+ "number": "13",+ "name": "FB",+ "type": "input",+ "description": "Feedback input regulated to 0.5V; connect to the center tap of a resistor divider from the output to GND to set the output voltage."+ },+ {+ "number": "14",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "15",+ "name": "N.C.",+ "type": "unconnected",+ "description": "Not connected internally; connect to GND or leave unconnected."+ },+ {+ "number": "16",+ "name": "EN",+ "type": "input",+ "description": "Enable input; connect to GND or a logic low to shut the device down, and to IN or a logic high for normal operation."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed paddle is listed as '—' with the label EP in the pin table, not as a numbered pin. It is; Pin 12 is shared between MAX8556 (POK) and MAX8557 (POR). The MPN is MAX8556, so the name is POK; th; Pin 1-6 bypass is given as 22µF in the pin table, but the Capacitor Selection section (page 10) reco",+ "exposed pad 17 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 12,+ "cost_usd": 0.0679,+ "at": "2026-10-18T15:24:27"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912372916764672",+ "pages": 12,+ "sha256": "4fa6f5030655818e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "max8556ete-t.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.92+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f5ba59630758c2469e3be92be71139c28e26fe8e03043ebd16a162c72c4ab685",+ "checked": "2026-10-18",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "max8556ete-t-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.92+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b74ade0ac586707f887992c1f3908791cc1c3a9fcc95282f396cfc715c36ea0a",+ "checked": "2026-10-18",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}
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