component
MAX706TM
Public Made by Adomby adom
HGSEMI Supervisor And Reset ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MAX706TM
HGSEMI · Supervisor And Reset ICs · SOP-8
MAX706TM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Active-LOW manual reset input with a 250µA internal pull-up, so it can be driven by TTL/CMOS logic or shorted to ground with a switch. |
| 2 | VCC | power_in | +5V power supply input; the electrical characteristics specify an operating range of 1.2 V to 5.5 V, and the absolute maximum supply is -0.3 V to +6.0 V. |
| 3 | GND | power_in | Ground reference for all signals. |
| 4 | PFI | input | Power-fail voltage monitor input; PFO goes low when PFI is below 1.25 V, and PFI should be connected to GND or VCC when not used. |
| 5 | PFO | output | Active-LOW power-fail output that sinks current when PFI is less than 1.25 V. |
| 6 | WDI | input | Watchdog input; a high or low transition within the 2.4 s timeout clears the timer, and floating or three-stating WDI disables the watchdog, with transitions as short as 50 ns recognized. |
| 7 | RESET | output | Active-LOW reset output that pulses low for 300 ms when triggered and stays low while VCC is below the reset threshold (4.4 V MAX706, 3.08 V MAX706T, 2.93 V MAX706S, 2.63 V MAX706R). |
| 8 | WDO | output | Watchdog output that pulls LOW when the 2.4 s watchdog timer times out and stays low until the watchdog is cleared, with no minimum pulse width and remaining low while VCC is below the reset threshold. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage range | Vcc | 1.2 | 5.5 | V | MAX706/T/S/R | 5 | |
| Supply current | Icc | 75 | 140 | µA | MAX706/T/S/R | 5 | |
| RESET threshold | VRT | 2.98 | 3.08 | 3.15 | V | MAX 706 T | 5 |
| RESET pulse width | tRS | 140 | 300 | 420 | ms | 5 | |
| Manual RESET pull-up current | 100 | 250 | 600 | µA | MR=0V | 5 | |
| MR input threshold VIH | VIH | 2 | V | 5 | |||
| MR input threshold VIL | VIL | 0.8 | V | 5 | |||
| RESET output voltage low | 0.4 | V | ISINK = 3.2mA | 5 | |||
| RESET output voltage low | 0.3 | V | Vcc=1.2V, ISINK = 100µA | 5 | |||
| Watchdog timeout period | tWD | 2 | 2.4 | 3 | s | MAX706/T/S/R | 5 |
| WDI pulse width | tWP | 50 | ns | VIL =0.4V, VIH =0.8Vcc | 5 | ||
| WDI input threshold VIH | VIH | 3.5 | V | MAX706/T/S/R, Vcc=5V | 5 | ||
| WDI input threshold VIL | VIL | 0.8 | V | 5 | |||
| WDI input current | 50 | 150 | µA | WDI=Vcc | 5 | ||
| WDI input current | -150 | -50 | µA | WDI=0V | 5 | ||
| PFI input threshold | 1.2 | 1.25 | 1.3 | V | Vcc=5V | 5 | |
| PFI input current | -25 | 0.01 | 25 | nA | 5 | ||
| WDO output voltage low | 0.4 | V | MAX706/T/S/R, ISINK = 1.2mA | 5 | |||
| PFO output voltage low | 0.4 | V | ISINK = 3.2mA | 5 | |||
| Supply voltage | -0.3 | 6 | V | Ta=25℃ | 4 | ||
| All other inputs | -0.3 | V | Ta=25℃ | 4 | |||
| Input current at Vcc and GND | 20 | mA | Ta=25℃ | 4 | |||
| Output current, all outputs | 20 | mA | Ta=25℃ | 4 | |||
| Rate of rise at Vcc | 100 | V/µs | Ta=25℃ | 4 | |||
| SOP power dissipation | 470 | mW | Derate 5.9mW/℃ above 70℃ | 4 | |||
| Operating temperature range | 0 | 70 | ℃ | 4 | |||
| Storage temperature range | -65 | 150 | ℃ | 4 | |||
| Lead temperature (soldering) | 245 | ℃ | 10 sec. | 4 | |||
| RESET threshold hysteresis | 40 | mV | 5 | ||||
| MR pulse width | tMR | 0.15 | µs | 5 | |||
| MR to RESET output delay | tMD | 0.25 | µs | 5 |
CAD (KiCad official)
- Symbol:
MAX706TM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
max706tm-etched.step/max706tm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max706tm.step/max706tm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (12 pp, sha256
a7db74b788192113, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MAX706TM
**HGSEMI** · Supervisor And Reset ICs · SOP-8
MAX706TM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Active-LOW manual reset input with a 250µA internal pull-up, so it can be driven by TTL/CMOS logic or shorted to ground with a switch. |
| 2 | VCC | power_in | +5V power supply input; the electrical characteristics specify an operating range of 1.2 V to 5.5 V, and the absolute maximum supply is -0.3 V to +6.0 V. |
| 3 | GND | power_in | Ground reference for all signals. |
| 4 | PFI | input | Power-fail voltage monitor input; PFO goes low when PFI is below 1.25 V, and PFI should be connected to GND or VCC when not used. |
| 5 | PFO | output | Active-LOW power-fail output that sinks current when PFI is less than 1.25 V. |
| 6 | WDI | input | Watchdog input; a high or low transition within the 2.4 s timeout clears the timer, and floating or three-stating WDI disables the watchdog, with transitions as short as 50 ns recognized. |
| 7 | RESET | output | Active-LOW reset output that pulses low for 300 ms when triggered and stays low while VCC is below the reset threshold (4.4 V MAX706, 3.08 V MAX706T, 2.93 V MAX706S, 2.63 V MAX706R). |
| 8 | WDO | output | Watchdog output that pulls LOW when the 2.4 s watchdog timer times out and stays low until the watchdog is cleared, with no minimum pulse width and remaining low while VCC is below the reset threshold. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage range | Vcc | 1.2 | | 5.5 | V | MAX706/T/S/R | 5 |
| Supply current | Icc | | 75 | 140 | µA | MAX706/T/S/R | 5 |
| RESET threshold | VRT | 2.98 | 3.08 | 3.15 | V | MAX 706 T | 5 |
| RESET pulse width | tRS | 140 | 300 | 420 | ms | | 5 |
| Manual RESET pull-up current | | 100 | 250 | 600 | µA | MR=0V | 5 |
| MR input threshold VIH | VIH | 2 | | | V | | 5 |
| MR input threshold VIL | VIL | | | 0.8 | V | | 5 |
| RESET output voltage low | | | | 0.4 | V | ISINK = 3.2mA | 5 |
| RESET output voltage low | | | | 0.3 | V | Vcc=1.2V, ISINK = 100µA | 5 |
| Watchdog timeout period | tWD | 2 | 2.4 | 3 | s | MAX706/T/S/R | 5 |
| WDI pulse width | tWP | 50 | | | ns | VIL =0.4V, VIH =0.8Vcc | 5 |
| WDI input threshold VIH | VIH | 3.5 | | | V | MAX706/T/S/R, Vcc=5V | 5 |
| WDI input threshold VIL | VIL | | | 0.8 | V | | 5 |
| WDI input current | | 50 | | 150 | µA | WDI=Vcc | 5 |
| WDI input current | | -150 | | -50 | µA | WDI=0V | 5 |
| PFI input threshold | | 1.2 | 1.25 | 1.3 | V | Vcc=5V | 5 |
| PFI input current | | -25 | 0.01 | 25 | nA | | 5 |
| WDO output voltage low | | | | 0.4 | V | MAX706/T/S/R, ISINK = 1.2mA | 5 |
| PFO output voltage low | | | | 0.4 | V | ISINK = 3.2mA | 5 |
| Supply voltage | | -0.3 | | 6 | V | Ta=25℃ | 4 |
| All other inputs | | -0.3 | | | V | Ta=25℃ | 4 |
| Input current at Vcc and GND | | | | 20 | mA | Ta=25℃ | 4 |
| Output current, all outputs | | | | 20 | mA | Ta=25℃ | 4 |
| Rate of rise at Vcc | | | | 100 | V/µs | Ta=25℃ | 4 |
| SOP power dissipation | | | | 470 | mW | Derate 5.9mW/℃ above 70℃ | 4 |
| Operating temperature range | | 0 | | 70 | ℃ | | 4 |
| Storage temperature range | | -65 | | 150 | ℃ | | 4 |
| Lead temperature (soldering) | | | | 245 | ℃ | 10 sec. | 4 |
| RESET threshold hysteresis | | | 40 | | mV | | 5 |
| MR pulse width | tMR | | 0.15 | | µs | | 5 |
| MR to RESET output delay | tMD | | 0.25 | | µs | | 5 |
## CAD (KiCad official)
- Symbol: `MAX706TM`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `max706tm-etched.step` / `max706tm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max706tm.step` / `max706tm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589838949352046592) (12 pp, sha256 `a7db74b788192113`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/max706tm-datasheet.pdf)