MAX706ASESA+T

{
  "slug": "max706asesa-t",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Inc Maxim Integrated Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "max706asesa+t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "max706asesa-t.kicad_sym",
    "max706asesa-t.kicad_mod",
    "max706asesa-t.glb",
    "max706asesa-t.step",
    "max706asesa-t.lbr",
    "docs/hero.png",
    "docs/max706asesa-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "max706asesa-t-hero.glb",
    "max706asesa-t-hero.overlay.json",
    "max706asesa-t-etched.glb"
  ],
  "component": {
    "mpn": "MAX706ASESA+T",
    "manufacturer": "Analog Devices Inc Maxim Integrated",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Supervisor And Reset ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588951996958691329",
    "parts": {
      "symbol": "max706asesa-t.kicad_sym",
      "footprint": "max706asesa-t.kicad_mod",
      "model_3d": "max706asesa-t-hero.glb",
      "model_3d_plain": "max706asesa-t-etched.glb",
      "model_3d_step": "max706asesa-t-etched.step",
      "model_3d_step_plain": "max706asesa-t.step",
      "lbr": "max706asesa-t.lbr"
    },
    "distributor_links": {
      "lcsc": "C2070362"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T18:31:08Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "MR",
        "type": "input",
        "description": "Active-low manual-reset input that resets the device when pulled below 0.6V, is TTL/CMOS compatible when VCC = 5V, is internally pulled up by a 70µA source, and should be connected to VCC or left unconnected if unused."
      },
      {
        "number": "2",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage input; the Electrical Characteristics give a supply range of 1.2V to 5.5V for the E (-40°C to +85°C) grade, and the AS-suffix conditions are stated as VCC = 3.0V to 5.5V."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      },
      {
        "number": "4",
        "name": "PFI",
        "type": "input",
        "description": "Adjustable power-fail comparator input that is compared to an internal 1.25V threshold, where PFO goes low when PFI falls below 1.25V, and which should be connected to GND if not used."
      },
      {
        "number": "5",
        "name": "PFO",
        "type": "output",
        "description": "Active-low power-fail comparator output that asserts (sinks current) when PFI is below the internal 1.25V threshold and should be left unconnected if not used."
      },
      {
        "number": "6",
        "name": "WDI",
        "type": "input",
        "description": "Watchdog input where a falling or rising transition must occur within 1.6s to prevent WDO from asserting; on the AR/AS/AT versions the watchdog disables when WDI is left open or driven by a tri-state output in high impedance with leakage below 600nA."
      },
      {
        "number": "7",
        "name": "RESET",
        "type": "output",
        "description": "Active-low reset output that remains low while VCC is below the reset threshold or MR is held low, and for 200ms after the reset conditions end."
      },
      {
        "number": "8",
        "name": "WDO",
        "type": "output",
        "description": "Active-low watchdog output that goes low when WDI has no transition within 1.6s, also goes low when VCC falls below the reset threshold, and returns high as soon as VCC rises above the reset threshold."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-configuration diagram text on page 11 is garbled, so the SO-8 pin map for the MAX706AR/AS/AT; In the extracted Pin Description table, the column alignment for the MAX706AR/AS/AT is ambiguous: th; The ordering table lists the base part MAX706ASESA (SO S8-2) without the +T suffix, and the footnote"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0786,
        "at": "2026-10-18T18:30:54"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588951996958691329",
        "pages": 15,
        "sha256": "8e1bd616ac8d73b9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "max706asesa-t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "max706asesa-t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "345bdf8350547f0161dc23611035d882a8ee1237966be4ec096745096c385729",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}