component
MAX6753KA29+T
Public Made by Adomby adom
Maxim Integrated Monitors & Reset Circuits, SOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MAX6753KA29+T
Maxim Integrated · Monitors & Reset Circuits · SOT-23-8
MAX6753KA29+T from Maxim Integrated, in a SOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SET0 | input | Logic input that, together with SET1, selects the fast watchdog window ratio (8, 16 or 64) or disables the watchdog when SET0 is high and SET1 is low; VIL is 0.8V max and VIH is 2.4V min at VCC ≥ 4.0V. |
| 2 | SWT | passive | Connect a low-leakage (<10nA, ceramic recommended) capacitor from SWT to GND to set the slow watchdog period tWD2 = 0.65 x 10^9 x CSWT (tWD2 in seconds, CSWT in farads). |
| 3 | SRT | passive | Connect a capacitor from SRT to GND to set the reset timeout period tRP = 4.94 x 10^6 x CSRT (tRP in seconds, CSRT in farads); the capacitor must be low-leakage (<10nA). |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SET1 | input | Logic input that, together with SET0, selects the fast watchdog window ratio or disables the watchdog timer (SET0 high and SET1 low disables it); VIL is 0.8V max and VIH is 2.4V min at VCC ≥ 4.0V. |
| 6 | WDI | input | Watchdog input; falling transitions faster than tWD1 or slower than tWD2 force RESET low for the reset timeout period, the pin has a 300ns minimum pulse width and must not be left floating (use a 100kΩ resistor to ground if the watchdog is unused). |
| 7 | RESET | output | Active-low reset output that asserts when VCC or RESET IN falls below its threshold or on manual reset and stays low for the reset timeout period after release; on the MAX6753 it is an open-drain output with a maximum rating of 6.0V to GND. |
| 8 | VCC | power_in | Supply voltage input and fixed-threshold VCC monitor, specified for 1.2V to 5.5V operation (1.0V minimum at TA = 0°C to +125°C) with a 6.0V absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOT-23-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (TA = 0°C to +125°C) | VCC | 1 | 5.5 | V | TA = 0°C to +125°C | 2 | |
| Supply Voltage (TA = -40°C to 0°C) | VCC | 1.2 | 5.5 | V | TA = -40°C to 0°C | 2 | |
| Supply Current | ICC | 5 | 10 | µA | VCC ≤ 5.5V | 2 | |
| Supply Current | ICC | 4.2 | 9 | µA | VCC ≤ 3.3V | 2 | |
| Supply Current | ICC | 3.7 | 8 | µA | VCC ≤ 2.0V | 2 | |
| VCC Reset Threshold tolerance | VTH | -2 | 2 | % | TA = -40°C to +125°C; see VTH selection table | 2 | |
| VCC Reset Threshold, suffix 29 (Table 2) | VTH | 2.867 | 2.925 | 2.984 | V | TA = -40°C to +125°C; suffix 29 | 13 |
| Reset Timeout Period | tRP | 5.692 | 7.59 | 9.487 | ms | CSRT = 1500pF | 2 |
| SRT Ramp Current | IRAMP | 200 | 250 | 300 | nA | VSRT = 0 to 1.23V; VCC = 1.6V to 5V | 2 |
| SRT Ramp Threshold | VRAMP | 1.173 | 1.235 | 1.297 | V | VCC = 1.6V to 5V (VRAMP rising) | 2 |
| Slow Watchdog Period (MAX6752/MAX6753) | tWD2 | 728.6 | 971.5 | 1214.4 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Timeout Period, SET Ratio = 8 | tWD1 | 91.08 | 121.43 | 151.8 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Timeout Period, SET Ratio = 16 | tWD1 | 45.53 | 60.71 | 75.89 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Timeout Period, SET Ratio = 64 | tWD1 | 11.38 | 15.18 | 18.98 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Minimum Period | 2000 | ns | 3 | ||||
| SWT Ramp Current | IRAMP | 200 | 250 | 300 | nA | VSWT = 0 to 1.23V, VCC = 1.6V to 5V | 3 |
| SWT Ramp Threshold | VRAMP | 1.173 | 1.235 | 1.297 | V | VCC = 1.6V to 5V (VRAMP rising) | 3 |
| RESET Output-Voltage Low | VOL | 0.3 | V | VCC ≥ 1.0V, ISINK = 50µA | 3 | ||
| RESET Output-Voltage Low | VOL | 0.4 | V | VCC ≥ 4.5V, ISINK = 3.2mA | 3 | ||
| RESET Output Leakage Current, Open Drain | ILKG | 1 | µA | VCC > VTH, reset not asserted, VRESET = 5.5V | 3 | ||
| Input Logic Level LOW | VIL | 0.8 | V | VCC ≥ 4.0V | 3 | ||
| Input Logic Level HIGH | VIH | 2.4 | V | VCC ≥ 4.0V | 3 | ||
| RESET IN Threshold | VRESET IN | 1.216 | 1.235 | 1.254 | V | TA = -40°C to +125°C | 4 |
| RESET IN Leakage Current | IRESET IN | -50 | 50 | nA | 4 | ||
| Thermal Resistance, Four-Layer Board, Junction-to-Ambient | qJA | 196 | JEDEC JESD51-7, four-layer board | 2 | |||
| Thermal Resistance, Four-Layer Board, Junction-to-Case | qJC | 70 | JEDEC JESD51-7, four-layer board | 2 | |||
| VCC to GND | VCC | -0.3 | 6 | V | 2 | ||
| RESET (Open-Drain) to GND | RESET | -0.3 | 6 | V | 2 | ||
| Input Current (All Pins) | -20 | 20 | mA | 2 | |||
| Output Current (RESET) | RESET | -20 | 20 | mA | 2 | ||
| Operating Temperature Range | TA | -40 | 125 | °C | 2 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Lead Temperature (soldering) | 300 | °C | soldering, 10s | 2 | |||
| Soldering Temperature (reflow) | 260 | °C | reflow | 2 |
CAD (KiCad official)
- Symbol:
MAX6753KA29+T - Footprint:
Package_TO_SOT_SMD:SOT-23-8 - 3D model: SOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
max6753ka29-t-etched.step/max6753ka29-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max6753ka29-t.step/max6753ka29-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Maxim Integrated datasheet (15 pp, sha256
144a666c7b8478b6, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MAX6753KA29+T
**Maxim Integrated** · Monitors & Reset Circuits · SOT-23-8
MAX6753KA29+T from Maxim Integrated, in a SOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SET0 | input | Logic input that, together with SET1, selects the fast watchdog window ratio (8, 16 or 64) or disables the watchdog when SET0 is high and SET1 is low; VIL is 0.8V max and VIH is 2.4V min at VCC ≥ 4.0V. |
| 2 | SWT | passive | Connect a low-leakage (<10nA, ceramic recommended) capacitor from SWT to GND to set the slow watchdog period tWD2 = 0.65 x 10^9 x CSWT (tWD2 in seconds, CSWT in farads). |
| 3 | SRT | passive | Connect a capacitor from SRT to GND to set the reset timeout period tRP = 4.94 x 10^6 x CSRT (tRP in seconds, CSRT in farads); the capacitor must be low-leakage (<10nA). |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SET1 | input | Logic input that, together with SET0, selects the fast watchdog window ratio or disables the watchdog timer (SET0 high and SET1 low disables it); VIL is 0.8V max and VIH is 2.4V min at VCC ≥ 4.0V. |
| 6 | WDI | input | Watchdog input; falling transitions faster than tWD1 or slower than tWD2 force RESET low for the reset timeout period, the pin has a 300ns minimum pulse width and must not be left floating (use a 100kΩ resistor to ground if the watchdog is unused). |
| 7 | RESET | output | Active-low reset output that asserts when VCC or RESET IN falls below its threshold or on manual reset and stays low for the reset timeout period after release; on the MAX6753 it is an open-drain output with a maximum rating of 6.0V to GND. |
| 8 | VCC | power_in | Supply voltage input and fixed-threshold VCC monitor, specified for 1.2V to 5.5V operation (1.0V minimum at TA = 0°C to +125°C) with a 6.0V absolute maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOT-23-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (TA = 0°C to +125°C) | VCC | 1 | | 5.5 | V | TA = 0°C to +125°C | 2 |
| Supply Voltage (TA = -40°C to 0°C) | VCC | 1.2 | | 5.5 | V | TA = -40°C to 0°C | 2 |
| Supply Current | ICC | | 5 | 10 | µA | VCC ≤ 5.5V | 2 |
| Supply Current | ICC | | 4.2 | 9 | µA | VCC ≤ 3.3V | 2 |
| Supply Current | ICC | | 3.7 | 8 | µA | VCC ≤ 2.0V | 2 |
| VCC Reset Threshold tolerance | VTH | -2 | | 2 | % | TA = -40°C to +125°C; see VTH selection table | 2 |
| VCC Reset Threshold, suffix 29 (Table 2) | VTH | 2.867 | 2.925 | 2.984 | V | TA = -40°C to +125°C; suffix 29 | 13 |
| Reset Timeout Period | tRP | 5.692 | 7.59 | 9.487 | ms | CSRT = 1500pF | 2 |
| SRT Ramp Current | IRAMP | 200 | 250 | 300 | nA | VSRT = 0 to 1.23V; VCC = 1.6V to 5V | 2 |
| SRT Ramp Threshold | VRAMP | 1.173 | 1.235 | 1.297 | V | VCC = 1.6V to 5V (VRAMP rising) | 2 |
| Slow Watchdog Period (MAX6752/MAX6753) | tWD2 | 728.6 | 971.5 | 1214.4 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Timeout Period, SET Ratio = 8 | tWD1 | 91.08 | 121.43 | 151.8 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Timeout Period, SET Ratio = 16 | tWD1 | 45.53 | 60.71 | 75.89 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Timeout Period, SET Ratio = 64 | tWD1 | 11.38 | 15.18 | 18.98 | ms | CSWT = 1500pF | 3 |
| Fast Watchdog Minimum Period | | 2000 | | | ns | | 3 |
| SWT Ramp Current | IRAMP | 200 | 250 | 300 | nA | VSWT = 0 to 1.23V, VCC = 1.6V to 5V | 3 |
| SWT Ramp Threshold | VRAMP | 1.173 | 1.235 | 1.297 | V | VCC = 1.6V to 5V (VRAMP rising) | 3 |
| RESET Output-Voltage Low | VOL | | | 0.3 | V | VCC ≥ 1.0V, ISINK = 50µA | 3 |
| RESET Output-Voltage Low | VOL | | | 0.4 | V | VCC ≥ 4.5V, ISINK = 3.2mA | 3 |
| RESET Output Leakage Current, Open Drain | ILKG | | | 1 | µA | VCC > VTH, reset not asserted, VRESET = 5.5V | 3 |
| Input Logic Level LOW | VIL | | | 0.8 | V | VCC ≥ 4.0V | 3 |
| Input Logic Level HIGH | VIH | 2.4 | | | V | VCC ≥ 4.0V | 3 |
| RESET IN Threshold | VRESET IN | 1.216 | 1.235 | 1.254 | V | TA = -40°C to +125°C | 4 |
| RESET IN Leakage Current | IRESET IN | -50 | | 50 | nA | | 4 |
| Thermal Resistance, Four-Layer Board, Junction-to-Ambient | qJA | | 196 | | | JEDEC JESD51-7, four-layer board | 2 |
| Thermal Resistance, Four-Layer Board, Junction-to-Case | qJC | | 70 | | | JEDEC JESD51-7, four-layer board | 2 |
| VCC to GND | VCC | -0.3 | | 6 | V | | 2 |
| RESET (Open-Drain) to GND | RESET | -0.3 | | 6 | V | | 2 |
| Input Current (All Pins) | | -20 | | 20 | mA | | 2 |
| Output Current (RESET) | RESET | -20 | | 20 | mA | | 2 |
| Operating Temperature Range | TA | -40 | | 125 | °C | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Junction Temperature | TJ | | | 150 | °C | | 2 |
| Lead Temperature (soldering) | | | | 300 | °C | soldering, 10s | 2 |
| Soldering Temperature (reflow) | | | | 260 | °C | reflow | 2 |
## CAD (KiCad official)
- Symbol: `MAX6753KA29+T`
- Footprint: `Package_TO_SOT_SMD:SOT-23-8`
- 3D model: SOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `max6753ka29-t-etched.step` / `max6753ka29-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max6753ka29-t.step` / `max6753ka29-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Maxim Integrated datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/max6746-max6753.pdf) (15 pp, sha256 `144a666c7b8478b6`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/max6753ka29-t-datasheet.pdf)