MAX6650EUB+ from Maxim Integrated, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TACH0	input	Tachometer input used to close the loop around the fan tachometer, with input impedance of 70 kΩ to 150 kΩ specified for 0 < VTACH < 9V.
2	GND	power_in	Ground reference for the device.
3	SDA	bidirectional	2-wire serial-data input/output, open drain, for the SMBus/I2C-compatible interface.
4	SCL	input	2-wire serial clock input for the SMBus/I2C-compatible interface.
5	ADD	input	Slave address select input; pin-strapping to GND, VCC, high-Z or 10kΩ to GND selects one of four slave addresses per Table 1.
6	GPIO1	bidirectional	General-purpose input/output, open drain, configurable as a FULL ON output or as a general-purpose input, with 10 mA sink capability.
7	GPIO0	bidirectional	General-purpose input/output, open drain, configurable as a general input/output or an active-low ALERT output, with 10 mA sink capability.
8	OUT	output	Output that drives the external MOSFET or bipolar transistor gate or base to regulate the voltage across the fan.
9	VCC	power_in	Power supply input, +3.0V to +5.5V.
10	FB	input	Feedback input that closes the loop around the external MOSFET or bipolar transistor; FB is rated to +13.2V maximum.

Key specifications

Parameter	Value
Manufacturer	Maxim Integrated
Package	MSOP-10
Category	Power Management ICs
Pins	10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage	VCC	3		5.5	V		2
Output Sink Current	ISINK			10	mA	VOUT = 0.5V	2
Output Voltage Range	VOUT	0.3			V	IOUT = ±100μA	2
Supply Current	ICC			10	mA	Full-on mode, IOUT = 0	2
Output Source Current	ISOURCE			50	mA	VOUT = VCC - 1.8V	2
Tachometer Input Impedance	RTACH_	70	100	150	kΩ	0 < VTACH < 9V	2
Feedback Input Impedance	RFB	70	100	150	kΩ	0 < VFB < 9V	2
Input Low Voltage	VIL(GPIO_)			0.8	V		2
Input High Voltage	VIH(GPIO_)	2			V	VCC ≤ 3.6V	2
Input High Voltage	VIH(GPIO_)	3			V	VCC > 3.6V	2
DAC Differential Nonlinearity				5	LSB	Guaranteed monotonicity on FB (Note 1)	2
Useful DAC Resolution		8			bits	Measured at FB (Note 1)	2
Input Hysteresis	VHYS		200		mV		2
Pullup Resistor	RGPIO_		100		kΩ		2
Absolute Maximum VCC to GND	VCC	-0.3		6	V	VCC to GND	2
Absolute Maximum FB, TACH_	VFB, VTACH_	-0.3		13.2	V	FB, TACH_	2
Absolute Maximum All Other Pins		-0.3			V	All other pins, VCC + 0.3V	2
Absolute Maximum Output Voltages		-0.3			V	Output voltages, VCC + 0.3V	2
Absolute Maximum Current Into VCC, GND, VOUT				100	mA	Into VCC, GND, VOUT	2
Absolute Maximum Current Into All Other Pins				50	mA	Into all other pins	2
Operating Temperature Range	TA	-40		85	°C		2
Junction Temperature	TJ			150	°C		2
Storage Temperature Range	TSTG	-65		150	°C		2
Lead Temperature (soldering, 10s)				300	°C	Soldering, 10s	2
Soldering Temperature (reflow) Lead(Pb)-free				260	°C	Lead(Pb)-free	2
Soldering Temperature (reflow) Containing lead(Pb)				240	°C	Containing lead(Pb)	2
Clock Frequency Uncertainty	fCLK	-10		10	%	VCC = 5V	3
SCL Clock Frequency	fSCL	0		400	kHz		3
Clock Frequency	fCLK		254		kHz		3
Glitch Rejection		500			μs	Minimum pulse duration	3
Bus Free Time Between Stop and Start Condition	tBUF	1.3			μs		3
Hold-Time Start Condition	tHD:STA	0.6			μs		3
Low Period of the SCL Clock	tLOW	1.3			μs		3
High Period of the SCL Clock	tHIGH	0.6			μs		3
Data Hold Time	tHD:DAT	0		900	μs	Note 5	3
Data Setup Time	tSU:DAT	100			ns		3
Rise-Time SDA/SCL Signal (Receiving)	tR			300	ns	Note 6	3
Fall-Time SDA/SCL Signal (Receiving)	tF			300	ns	Note 6	3
Fall-Time SDA Signal (Transmitting)	tF			250	ns	ISINK < 6mA (Note 6)	3
ADD Input Low Voltage	VIL(ADD)			0.1	V	Selects slave address 90h (Table 1)	3
ADD External Pulldown Resistor to GND	RADD	9.5		10.5	kΩ	Selects slave address 3Eh (Table 1)	3
ADD Pulldown Current	IADD	-80		-40	μA	VADD = 0.5V (Note 4)	3
ADD Input Leakage	ILADD	-1	0		μA	Selects slave address 36h (Table 1) (Note 3)	3
Data Output Sink Current	ISDA	6			mA	VSDA = 0.6V	3
Input Leakage Current		-1		1	μA	0 < VIN < VCC	3
Input Low Voltage	VIL			0.8	V		3
Input High Voltage	VIH	2			V	VCC ≤ 3.6V	3
Input High Voltage	VIH	3			V	VCC > 3.6V	3
Input Hysteresis	VHYS		200		mV	SDA, SCL	3
Setup Time for Stop Condition	tSU:STO	0.6			μs	TA = +25°C	4
Pulse Width of Spike Suppressed	tSPIKE	0		50	ns	TA = +25°C	4

CAD (KiCad official)

Symbol: MAX6650EUB+
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: MSOP-10 (KiCad packages3D, STEP)
3D model files: max6650eub-etched.step / max6650eub-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max6650eub.step / max6650eub.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Maxim Integrated datasheet (25 pp, sha256 cee9d3417b77f26f, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MAX6650EUB+

Verified MAX6650EUB+

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README