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MAX660CSA+T-TUDI
Public Made by Adomby adom
Tudi Charge Pumps, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMAX660CSA+T-TUDI
Tudi · Charge Pumps · SOP-8
MAX660CSA+T-TUDI from Tudi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FC | input | Frequency Control for internal oscillator: FC = open sets fOSC = 10kHz typ; FC = V+ sets fOSC = 80kHz typ (40kHz min); FC has no effect when OSC pin is driven externally. |
| 2 | CAP+ | passive | Charge-pump flying capacitor positive terminal; connect external capacitor C1 (1µF to 150µF) between CAP+ and CAP-; C1 ESR has approximately 4× the voltage-loss impact of C2 ESR. |
| 3 | GND | power_in | Power-supply ground input; reference potential for the device. |
| 4 | CAP- | passive | Charge-pump flying capacitor negative terminal; connect external capacitor C1 (1µF to 150µF) between CAP+ and CAP-. |
| 5 | OUT | power_out | Output pin: negative voltage output in inverter mode (VOUT = −VIN) or doubled positive voltage output in doubler mode (VOUT = 2×VIN); 100mA continuous output current, 6.5Ω typ output impedance; OUT must not be shorted to V+. |
| 6 | LV | input | Low-Voltage Operation Input: tie to GND when V+ < 3V for best low-voltage performance; may be GND or left open when V+ > 3V; must be tied to GND when overdriving OSC; must be tied to OUT in voltage-doubling mode. |
| 7 | OSC | input | Oscillator Control Input; connected internally to a 15pF capacitor; add external capacitor between OSC and GND to reduce oscillator frequency; may be overdriven by an external CMOS clock swinging within 100mV of V+ and GND; charge-pump frequency is one-half the oscillator frequency. |
| 8 | V+ | power_in | Power-supply positive voltage input; operating range 1.5V to 5.5V (inverter) or 2.5V to 5.5V (doubler); absolute maximum V+ to GND = 6V; substrate connected to V+. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
MAX660CSA+T-TUDI - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
max660csa-t-tudi-etched.step/max660csa-t-tudi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max660csa-t-tudi.step/max660csa-t-tudi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (12 pp, sha256
b36e77b34f132ee1, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).