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MAX6372KA+T

Maxim Integrated · Monitors & Reset Circuits · SOT-23-8

MAX6372KA+T from Maxim Integrated, in a SOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 WDI input Watchdog input: if WDI stays either high or low for the full watchdog timeout period (tWD), WDO pulses, and WDI must be connected to ground through a 100k (max) resistor if it is not driven by an external logic-level input.
2 GND power_in Ground reference for the device; all terminal voltages are specified with respect to GND.
3 N.C. unconnected Not connected; do not make any connection to this pin.
4 SET0 input Logic input that, together with SET1 and SET2, selects the startup delay and watchdog timeout periods per Table 1, with a logic-high input threshold of 0.8 x VCC minimum.
5 SET1 input Logic input that, together with SET0 and SET2, selects the startup delay and watchdog timeout periods per Table 1, with a logic-high input threshold of 0.8 x VCC minimum.
6 SET2 input Logic input that, together with SET0 and SET1, selects the startup delay and watchdog timeout periods per Table 1, with a logic-high input threshold of 0.8 x VCC minimum.
7 WDO output Push-pull, active-low watchdog output that pulses low for the watchdog output pulse width tWDO (1 ms to 3 ms) when the watchdog times out, and needs no pullup resistor on this push-pull variant.
8 VCC power_in Supply voltage, specified from +2.5 V to +5.5 V.

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package SOT-23-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage Range VCC 2.5 5.5 V TA = -40°C to +125°C 3
Supply Current ICC 8 20 µA No load, TA = -40°C to +85°C 3
Supply Current ICC 10 22 µA No load, TA = -40°C to +125°C 3
Input Low Voltage VIL 0.8 V WDI, SET0, SET1, SET2; VCC ≥ 3.3V, TA = -40°C to +85°C 3
Input Low Voltage VIL 0.6 V WDI, SET0, SET1, SET2; VCC ≥ 3.3V, TA = -40°C to +125°C 3
Input Low Voltage VIL 0.4 V WDI, SET0, SET1, SET2; VCC ≥ 2.5V, TA = -40°C to +125°C 3
Logic Input Current -10 0 10 nA VWDI or VSET_ = 0V or VCC 3
WDO Output Low Voltage VOL 0.3 V ISINK = 1.2mA, VCC > 2.7V, watchdog output asserted 3
WDO Output Low Voltage VOL 0.4 V ISINK = 6mA, VCC > 4.5V, watchdog output asserted 3
Startup Delay Period tDELAY 60 180 s All other SET_ conditions (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 1 3 ms VSET2 = 0V, VSET1 = 0V, VSET0 = 0V (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 3 9 ms VSET2 = 0V, VSET1 = 0V, SET0 = VCC (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 10 30 ms VSET2 = 0V, SET1 = VCC, VSET0 = 0V (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 100 300 ms SET2 = VCC, VSET1 = 0V, VSET0 = 0V (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 300 900 ms SET2 = VCC, VSET1 = 0V, SET0 = VCC (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 3 9 s SET2 = VCC, SET1 = VCC, VSET0 = 0V (MAX6371/MAX6372) 4
Watchdog Time-Out Period tWD 60 180 s SET2 = VCC, SET1 = VCC, SET0 = VCC (MAX6371/MAX6372) 4
Watchdog Output Pulse Width tWDO 1 3 ms MAX6370/MAX6372/MAX6374 5
VCC Terminal Voltage (with respect to GND) VCC -0.3 6 V With respect to GND 2
WDI Terminal Voltage (with respect to GND) WDI -0.3 6 V With respect to GND 2
Maximum Current, Any Pin 20 mA Input/output 2
Operating Temperature Range TA -40 125 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Junction Temperature TJ 150 °C 2
Lead Temperature (soldering) 300 °C Soldering, 10s 2
Soldering Temperature (reflow), Lead(Pb)-free 260 °C Lead(Pb)-free 2
Soldering Temperature (reflow), Containing Lead 240 °C Containing lead (Pb) 2
Thermal Resistance Junction to Case, Single-Layer Board θJC 80 °C/W Single-layer board 2
Thermal Resistance Junction to Ambient, Multi-Layer Board θJA 180 °C/W Multi-layer board, JESD51-7 four-layer board 2
Thermal Resistance Junction to Case, Multi-Layer Board θJC 60 °C/W Multi-layer board, JESD51-7 four-layer board 2

CAD (KiCad official)

  • Symbol: MAX6372KA+T
  • Footprint: Package_TO_SOT_SMD:SOT-23-8
  • 3D model: SOT-23-8 (KiCad packages3D, STEP)
  • 3D model files: max6372ka-t-etched.step / max6372ka-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max6372ka-t.step / max6372ka-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (12 pp, sha256 c6de00247c521b3f, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF