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MAX6325ESA+T
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Analog Devices Inc Maxim Integrated Voltage Reference, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MAX6325ESA+T
Analog Devices Inc Maxim Integrated · Voltage Reference · SOP-8
MAX6325ESA+T from Analog Devices Inc Maxim Integrated, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I.C. | unconnected | Internally connected; the datasheet says do not use this pin. |
| 2 | IN | power_in | Positive power-supply input; VIN must be within 8V to 36V (absolute maximum 40V), with optional bypass capacitor to GND. |
| 3 | NR | passive | Noise-reduction pin for an optional capacitor (1µF suggested for wideband noise reduction); leave open if not used. |
| 4 | GND | power_in | Ground reference for all voltages; absolute maximum ratings are referenced to GND. |
| 5 | TRIM | input | External trim input allowing about ±1% output adjustment through a 10kΩ potentiometer between OUT and GND; leave open if not used. |
| 6 | OUT | power_out | Voltage reference output, specified for source and sink currents up to 15mA; OUT is rated -0.3V to 12V and is continuous short-circuit to GND for VIN ≤ 12V. |
| 7 | I.C. | unconnected | Internally connected; the datasheet says do not use this pin. |
| 8 | I.C. | unconnected | Internally connected; the datasheet says do not use this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VOUT | 2.499 | 2.5 | 2.501 | V | VIN = +10V, IOUT = 0mA, TA = TMIN to TMAX | 2 |
| Input voltage range | VIN | 8 | 36 | V | 2 | ||
| Trim-adjustment range | ∆VOUT | -25 | 15 | 25 | mV | C, E, M grades; printed as ±15 typ, ±25 max | 2 |
| Output voltage temperature coefficient (E grade) | TCVOUT | 0.75 | 1.5 | ppm/°C | TA = TMIN to TMAX; box method (Note 1) | 2 | |
| Line regulation, 10V ≤ VIN ≤ 36V, +25°C | ∆VOUT/∆VIN | 2 | 5 | ppm/V | 10V ≤ VIN ≤ 36V, TA = +25°C | 2 | |
| Line regulation, 10V ≤ VIN ≤ 36V, E grade over temperature | ∆VOUT/∆VIN | 8 | ppm/V | 10V ≤ VIN ≤ 36V, TA = TMIN to TMAX | 2 | ||
| Line regulation, 8V ≤ VIN ≤ 10V, +25°C | ∆VOUT/∆VIN | 10 | 18 | ppm/V | 8V ≤ VIN ≤ 10V, TA = +25°C | 2 | |
| Line regulation, 8V ≤ VIN ≤ 10V, E grade over temperature | ∆VOUT/∆VIN | 35 | ppm/V | 8V ≤ VIN ≤ 10V, TA = TMIN to TMAX | 2 | ||
| Supply current, +25°C | IIN | 1.8 | 2.7 | mA | TA = +25°C | 2 | |
| Supply current, over temperature (C, E, M) | IIN | 3 | mA | TA = TMIN to TMAX | 2 | ||
| Output noise voltage, 10Hz ≤ f ≤ 1kHz | en | 1.3 | 2.8 | µVRMS | 10Hz ≤ f ≤ 1kHz, TA = +25°C | 2 | |
| Load regulation, E grade | ∆VOUT/∆IOUT | 1 | 7 | ppm/mA | Sourcing 0mA ≤ IOUT ≤ 15mA; Sinking -15mA ≤ IOUT ≤ 0mA | 2 | |
| Long-term stability, E grade | ∆VOUT/t | 1 | 7 | ppm/1000hr | 2 | ||
| IN pin voltage (absolute maximum) | -0.3 | 40 | V | Voltages referenced to GND | 2 | ||
| OUT, TRIM pin voltage (absolute maximum) | -0.3 | 12 | V | Voltages referenced to GND | 2 | ||
| NR pin voltage (absolute maximum) | -0.3 | 6 | V | Voltages referenced to GND | 2 | ||
| Storage temperature range | -65 | 150 | °C | 2 | |||
| Lead temperature (soldering, 10s) | 300 | °C | Soldering, 10s | 2 | |||
| Operating temperature range (E grade, MAX63__E_A) | TA | -40 | 85 | °C | MAX6325ESA 8-pin SO, E grade | 2 | |
| Output source/sink current | IOUT | -15 | 15 | mA | Sinking to sourcing | 1 | |
| Capacitive load range | COUT | 0 | 100 | µF | For all values of load current | 8 |
CAD (KiCad official)
- Symbol:
MAX6325ESA+T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
max6325esa-t-etched.step/max6325esa-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max6325esa-t.step/max6325esa-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (11 pp, sha256
69acce71755feec7, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MAX6325ESA+T
**Analog Devices Inc Maxim Integrated** · Voltage Reference · SOP-8
MAX6325ESA+T from Analog Devices Inc Maxim Integrated, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I.C. | unconnected | Internally connected; the datasheet says do not use this pin. |
| 2 | IN | power_in | Positive power-supply input; VIN must be within 8V to 36V (absolute maximum 40V), with optional bypass capacitor to GND. |
| 3 | NR | passive | Noise-reduction pin for an optional capacitor (1µF suggested for wideband noise reduction); leave open if not used. |
| 4 | GND | power_in | Ground reference for all voltages; absolute maximum ratings are referenced to GND. |
| 5 | TRIM | input | External trim input allowing about ±1% output adjustment through a 10kΩ potentiometer between OUT and GND; leave open if not used. |
| 6 | OUT | power_out | Voltage reference output, specified for source and sink currents up to 15mA; OUT is rated -0.3V to 12V and is continuous short-circuit to GND for VIN ≤ 12V. |
| 7 | I.C. | unconnected | Internally connected; the datasheet says do not use this pin. |
| 8 | I.C. | unconnected | Internally connected; the datasheet says do not use this pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VOUT | 2.499 | 2.5 | 2.501 | V | VIN = +10V, IOUT = 0mA, TA = TMIN to TMAX | 2 |
| Input voltage range | VIN | 8 | | 36 | V | | 2 |
| Trim-adjustment range | ∆VOUT | -25 | 15 | 25 | mV | C, E, M grades; printed as ±15 typ, ±25 max | 2 |
| Output voltage temperature coefficient (E grade) | TCVOUT | | 0.75 | 1.5 | ppm/°C | TA = TMIN to TMAX; box method (Note 1) | 2 |
| Line regulation, 10V ≤ VIN ≤ 36V, +25°C | ∆VOUT/∆VIN | | 2 | 5 | ppm/V | 10V ≤ VIN ≤ 36V, TA = +25°C | 2 |
| Line regulation, 10V ≤ VIN ≤ 36V, E grade over temperature | ∆VOUT/∆VIN | | | 8 | ppm/V | 10V ≤ VIN ≤ 36V, TA = TMIN to TMAX | 2 |
| Line regulation, 8V ≤ VIN ≤ 10V, +25°C | ∆VOUT/∆VIN | | 10 | 18 | ppm/V | 8V ≤ VIN ≤ 10V, TA = +25°C | 2 |
| Line regulation, 8V ≤ VIN ≤ 10V, E grade over temperature | ∆VOUT/∆VIN | | | 35 | ppm/V | 8V ≤ VIN ≤ 10V, TA = TMIN to TMAX | 2 |
| Supply current, +25°C | IIN | | 1.8 | 2.7 | mA | TA = +25°C | 2 |
| Supply current, over temperature (C, E, M) | IIN | | | 3 | mA | TA = TMIN to TMAX | 2 |
| Output noise voltage, 10Hz ≤ f ≤ 1kHz | en | | 1.3 | 2.8 | µVRMS | 10Hz ≤ f ≤ 1kHz, TA = +25°C | 2 |
| Load regulation, E grade | ∆VOUT/∆IOUT | | 1 | 7 | ppm/mA | Sourcing 0mA ≤ IOUT ≤ 15mA; Sinking -15mA ≤ IOUT ≤ 0mA | 2 |
| Long-term stability, E grade | ∆VOUT/t | | 1 | 7 | ppm/1000hr | | 2 |
| IN pin voltage (absolute maximum) | | -0.3 | | 40 | V | Voltages referenced to GND | 2 |
| OUT, TRIM pin voltage (absolute maximum) | | -0.3 | | 12 | V | Voltages referenced to GND | 2 |
| NR pin voltage (absolute maximum) | | -0.3 | | 6 | V | Voltages referenced to GND | 2 |
| Storage temperature range | | -65 | | 150 | °C | | 2 |
| Lead temperature (soldering, 10s) | | | | 300 | °C | Soldering, 10s | 2 |
| Operating temperature range (E grade, MAX63__E_A) | TA | -40 | | 85 | °C | MAX6325ESA 8-pin SO, E grade | 2 |
| Output source/sink current | IOUT | -15 | | 15 | mA | Sinking to sourcing | 1 |
| Capacitive load range | COUT | 0 | | 100 | µF | For all values of load current | 8 |
## CAD (KiCad official)
- Symbol: `MAX6325ESA+T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `max6325esa-t-etched.step` / `max6325esa-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max6325esa-t.step` / `max6325esa-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices Inc Maxim Integrated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589954967827353600) (11 pp, sha256 `69acce71755feec7`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/max6325esa-t-datasheet.pdf)