component

MAX6303ESA+

Public Made by Adom

by adom

Maxim Integrated Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsmax6303esa+factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers max6303esa: viewers · Ray 10d ago
max6303esa-etched.glb Publish 0.1.0 · Ray 10d ago
max6303esa-etched.step max6303esa: factory component page (tier=mfr) · Ray 10d ago
max6303esa-hero.glb max6303esa: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
max6303esa-hero.overlay.json Publish 0.1.0 · Ray 10d ago
max6303esa.glb Publish 0.1.0 · Ray 10d ago
max6303esa.kicad_mod Publish 0.1.0 · Ray 10d ago
max6303esa.kicad_sym Publish 0.1.0 · Ray 10d ago
max6303esa.lbr Publish 0.1.0 · Ray 10d ago
max6303esa.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago

MAX6303ESA+

Maxim Integrated · Monitors & Reset Circuits · SOIC-8

MAX6303ESA+ from Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET IN input High-impedance input to the reset comparator, connected to the center of an external resistor divider so that VRST = 1.22 x (R1 + R2)/R2 sets the reset threshold.
2 GND power_in Ground reference for the device.
3 SRT passive Set reset-timeout input; a capacitor to ground sets tRP = 2.67 x CSRT (CSRT in pF, tRP in µs), and the pin is a precision 500nA timing node that requires a capacitor with leakage below 10nA.
4 SWT passive Set watchdog-timeout input; a capacitor to ground sets the basic timeout tWD = 2.67 x CSWT (CSWT in pF, tWD in µs), and tying this pin to ground disables the watchdog.
5 WDS input Watchdog-select input: GND selects normal mode with the basic timeout, VCC selects extended mode that multiplies the timeout by 500, and any change of state resets the watchdog timer to zero.
6 WDI input Watchdog input: a rising or falling transition must occur within the selected timeout period or a reset pulse is issued, and in normal mode WDI is a high-impedance CMOS input that must not be left unconnected.
7 RESET output Push-pull, active-low reset output on the MAX6303 that goes low when the monitored voltage falls below VRST and remains low for the reset timeout after VIN exceeds VRST or after a watchdog timeout, with VOL of 0.4V maximum at 3.2mA for VCC ≥ 4.5V.
8 VCC power_in Supply voltage, specified from 1.20V minimum to 5.50V maximum for the MAX6303E, and should be bypassed to ground with a 0.1µF capacitor placed as close as possible to the pin.

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage Range (MAX6301E/MAX6303E) VCC 1.2 5.5 V 2
Supply Current ICC 4 7 µA No load 2
Reset Input Threshold Voltage (falling) VTH 1.195 1.22 1.245 V VRESET IN falling, VCC = 5.0V 2
Reset Input Threshold Voltage (rising) VTH 1.24 1.265 V VRESET IN rising, VCC = 5.0V 2
Reset Input Leakage Current IRESET IN -1 1 nA 2
Reset Output-Voltage Low VOL 0.4 V VCC ≥ 4.5V, ISINK = 3.2mA 2
Reset Output-Voltage Low VOL 0.3 V VCC = 1V, ISINK = 50µA, TA = 0°C to +70°C 2
Reset Output-Voltage Low (MAX6301/MAX6303) VOL 0.3 V VCC = 1.2V, ISINK = 100µA, TA = -40°C to +85°C 2
Reset Timeout Period tRP 2.8 4 5.2 ms CSRT = 1500pF 2
WDI, WDS Input Threshold High VIH 0.7 x VCC WDI, WDS input threshold 3
WDI, WDS Input Threshold Low VIL 0.3 x VCC WDI, WDS input threshold 3
WDI Pulse Width tWP 30 ns VCC = 4.5V to 5.5V 3
WDI Pulse Width tWP 60 ns VCC = 2V to 4.5V 3
WDI, WDS Leakage Current -1 1 µA Extended mode disabled 3
WDI Sink/Source Current -70 70 µA Extended mode enabled (Note 4) 3
Watchdog Timeout Period (normal mode) tWD 2.8 4 5.2 ms WDS = GND, CSWT = 1500pF 3
Watchdog Timeout Period (extended mode) tWD 1.4 2 2.6 s WDS = VCC, CSWT = 1500pF 3
VCC Supply Voltage (absolute maximum) VCC -0.3 7 V 2
WDI, WDS Input Voltage (absolute maximum) -0.3 7 V 2
VCC Input Current -20 20 mA 2
GND Input Current -20 20 mA 2
RESET, RESET Output Current -20 20 mA 2
Storage Temperature Range TSTG -65 160 °C 2
Lead Temperature (soldering) 300 °C Soldering, 10s 2
Soldering Temperature (reflow, lead-free) 260 °C Lead(Pb)-free 2
Operating Temperature Range (E grade) TA -40 85 °C MAX630_E_A 2
Reset Input Hysteresis VHYST 20 mV 2
VCC to Reset Delay tRD 63 µs VCC falling at 1mV/µs 2
Reset Input Pulse Width tRI 26 µs Comparator overdrive = 50mV 2

CAD (KiCad official)

  • Symbol: MAX6303ESA+
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: max6303esa-etched.step / max6303esa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max6303esa.step / max6303esa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (12 pp, sha256 599e498038959b58, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF